soc/intel/tigerlake: Add enum for `DdiPortXConfig`

Add an enum for `DdiPortXConfig` devicetree options. Note that setting
these options to zero does not disable the corresponding DDI port, but
instead indicates that no LFP (Local Flat Panel, i.e. internal LCD) is
connected to it.

Change-Id: I9ea10141e51bf29ea44199dcd1b55b63ec771c0a
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64047
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Tim Crawford <tcrawford@system76.com>

11 files changed, 25 insertions, 23 deletions

diff --git a/src/mainboard/clevo/tgl-u/variants/l140mu/devicetree.cb b/src/mainboard/clevo/tgl-u/variants/l140mu/devicetree.cb
index 38097543818c..e89414b3c49e 100644
--- a/src/mainboard/clevo/tgl-u/variants/l140mu/devicetree.cb
+++ b/src/mainboard/clevo/tgl-u/variants/l140mu/devicetree.cb
@@ -23,11 +23,11 @@ chip soc/intel/tigerlake
 		device ref igpu on
 			register "gfx" = "GMA_DEFAULT_PANEL(0)"
 			# eDP
-			register "DdiPortAConfig" = "1"
+			register "DdiPortAConfig" = "DDI_PORT_CFG_EDP"
 			register "DdiPortAHpd" = "1"
 			register "DdiPortADdc" = "0"
 			# HDMI
-			register "DdiPortBConfig" = "0"
+			register "DdiPortBConfig" = "DDI_PORT_CFG_NO_LFP"
 			register "DdiPortBHpd" = "1"
 			register "DdiPortBDdc" = "1"
 		end
diff --git a/src/mainboard/google/deltaur/variants/baseboard/devicetree.cb b/src/mainboard/google/deltaur/variants/baseboard/devicetree.cb
index f5dc01910d5f..6603bafccc23 100644
--- a/src/mainboard/google/deltaur/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/deltaur/variants/baseboard/devicetree.cb
@@ -116,7 +116,7 @@ chip soc/intel/tigerlake
 	register "TcssXhciEn" = "1"
 
 	# DisplayPort
-	register "DdiPortAConfig" = "1"	# eDP
+	register "DdiPortAConfig" = "DDI_PORT_CFG_EDP"
 	register "DdiPortAHpd" = "1"
 
 	# Disable PM to allow for shorter irq pulses
diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
index 5e5a5863dd4a..9f3987e67214 100644
--- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
@@ -239,8 +239,8 @@ chip soc/intel/tigerlake
 	register "TcssAuxOri" = "0"
 
 	# DP port
-	register "DdiPortAConfig" = "1"	# eDP
-	register "DdiPortBConfig" = "0"
+	register "DdiPortAConfig" = "DDI_PORT_CFG_EDP"
+	register "DdiPortBConfig" = "DDI_PORT_CFG_NO_LFP"
 
 	register "DdiPortAHpd" = "1"
 	register "DdiPortBHpd" = "1"
diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
index 2c9a548ae0ff..1af05c49cd9e 100644
--- a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
+++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
@@ -68,7 +68,7 @@ chip soc/intel/tigerlake
 	register "SataPortsEnable[1]" = "1"
 
 	# enabling EDP in PortA
-	register "DdiPortAConfig" = "1"
+	register "DdiPortAConfig" = "DDI_PORT_CFG_EDP"
 
 	register "DdiPortBHpd" = "1"
 	register "DdiPort1Hpd" = "1"
diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
index d19747a5c0ab..ad1a45d2e714 100644
--- a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
+++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
@@ -65,7 +65,7 @@ chip soc/intel/tigerlake
 	register "PcieClkSrcUsage[3]" = "0x8"
 
 	# enabling EDP in PortA
-	register "DdiPortAConfig" = "1"
+	register "DdiPortAConfig" = "DDI_PORT_CFG_EDP"
 
 	register "DdiPortAHpd" = "1"
 	register "DdiPortADdc" = "0"
diff --git a/src/mainboard/system76/darp7/devicetree.cb b/src/mainboard/system76/darp7/devicetree.cb
index 4b7ad233ea81..dd356169eaf4 100644
--- a/src/mainboard/system76/darp7/devicetree.cb
+++ b/src/mainboard/system76/darp7/devicetree.cb
@@ -94,12 +94,12 @@ chip soc/intel/tigerlake
 		device ref system_agent on end
 		device ref igpu on
 			# DDIA is eDP
-			register "DdiPortAConfig" = "1"
+			register "DdiPortAConfig" = "DDI_PORT_CFG_EDP"
 			register "DdiPortAHpd" = "1"
 			register "DdiPortADdc" = "0"
 
 			# DDIB is HDMI
-			register "DdiPortBConfig" = "0"
+			register "DdiPortBConfig" = "DDI_PORT_CFG_NO_LFP"
 			register "DdiPortBHpd" = "1"
 			register "DdiPortBDdc" = "1"
 
diff --git a/src/mainboard/system76/galp5/devicetree.cb b/src/mainboard/system76/galp5/devicetree.cb
index 81163b654793..5650f2061fb5 100644
--- a/src/mainboard/system76/galp5/devicetree.cb
+++ b/src/mainboard/system76/galp5/devicetree.cb
@@ -94,12 +94,12 @@ chip soc/intel/tigerlake
 		device ref system_agent on end
 		device ref igpu on
 			# DDIA is eDP
-			register "DdiPortAConfig" = "1"
+			register "DdiPortAConfig" = "DDI_PORT_CFG_EDP"
 			register "DdiPortAHpd" = "1"
 			register "DdiPortADdc" = "0"
 
 			# DDIB is HDMI
-			register "DdiPortBConfig" = "0"
+			register "DdiPortBConfig" = "DDI_PORT_CFG_NO_LFP"
 			register "DdiPortBHpd" = "1"
 			register "DdiPortBDdc" = "1"
 
diff --git a/src/mainboard/system76/gaze16/devicetree.cb b/src/mainboard/system76/gaze16/devicetree.cb
index a92f0449753c..fbab7fbaab49 100644
--- a/src/mainboard/system76/gaze16/devicetree.cb
+++ b/src/mainboard/system76/gaze16/devicetree.cb
@@ -87,12 +87,12 @@ chip soc/intel/tigerlake
 		device ref system_agent on end
 		device ref igpu on
 			# DDIA is eDP
-			register "DdiPortAConfig" = "1"
+			register "DdiPortAConfig" = "DDI_PORT_CFG_EDP"
 			register "DdiPortAHpd" = "1"
 			register "DdiPortADdc" = "0"
 
 			# DDIB is HDMI
-			register "DdiPortBConfig" = "0"
+			register "DdiPortBConfig" = "DDI_PORT_CFG_NO_LFP"
 			register "DdiPortBHpd" = "1"
 			register "DdiPortBDdc" = "1"
 		end
diff --git a/src/mainboard/system76/lemp10/devicetree.cb b/src/mainboard/system76/lemp10/devicetree.cb
index e84c40549610..74bd7da99a64 100644
--- a/src/mainboard/system76/lemp10/devicetree.cb
+++ b/src/mainboard/system76/lemp10/devicetree.cb
@@ -94,12 +94,12 @@ chip soc/intel/tigerlake
 		device ref system_agent on end
 		device ref igpu on
 			# DDIA is eDP
-			register "DdiPortAConfig" = "1"
+			register "DdiPortAConfig" = "DDI_PORT_CFG_EDP"
 			register "DdiPortAHpd" = "1"
 			register "DdiPortADdc" = "0"
 
 			# DDIB is HDMI
-			register "DdiPortBConfig" = "0"
+			register "DdiPortBConfig" = "DDI_PORT_CFG_NO_LFP"
 			register "DdiPortBHpd" = "1"
 			register "DdiPortBDdc" = "1"
 
diff --git a/src/mainboard/system76/oryp8/devicetree.cb b/src/mainboard/system76/oryp8/devicetree.cb
index 65b6e874cdfb..ec01d8a40c28 100644
--- a/src/mainboard/system76/oryp8/devicetree.cb
+++ b/src/mainboard/system76/oryp8/devicetree.cb
@@ -105,7 +105,7 @@ chip soc/intel/tigerlake
 		end
 		device ref igpu on
 			# DDIA is eDP
-			register "DdiPortAConfig" = "1"
+			register "DdiPortAConfig" = "DDI_PORT_CFG_EDP"
 			register "DdiPortAHpd" = "1"
 			register "DdiPortADdc" = "0"
 		end
diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h
index 1f36e271569b..746cfa22257c 100644
--- a/src/soc/intel/tigerlake/chip.h
+++ b/src/soc/intel/tigerlake/chip.h
@@ -92,6 +92,12 @@ enum slew_rate {
 	SLEW_FAST_16
 };
 
+enum ddi_port_config {
+	DDI_PORT_CFG_NO_LFP	= 0,
+	DDI_PORT_CFG_EDP	= 1,
+	DDI_PORT_CFG_MIPI_DSI	= 2,
+};
+
 struct soc_intel_tigerlake_config {
 
 	/* Common struct containing soc config data required by common code */
@@ -367,13 +373,9 @@ struct soc_intel_tigerlake_config {
 	 */
 	uint8_t gpio_pm[TOTAL_GPIO_COMM];
 
-	/* DP config */
-	/*
-	 * Port config
-	 * 0:Disabled, 1:eDP, 2:MIPI DSI
-	 */
-	uint8_t DdiPortAConfig;
-	uint8_t DdiPortBConfig;
+	/* DDI port config */
+	enum ddi_port_config DdiPortAConfig;
+	enum ddi_port_config DdiPortBConfig;
 
 	/* Enable(1)/Disable(0) HPD */
 	uint8_t DdiPortAHpd;