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authorEugene Myers <edmyers@tycho.nsa.gov>2021-06-16 06:18:20 -0400
committerStefan Reinauer <stefan.reinauer@coreboot.org>2023-06-10 03:21:23 +0000
commit34010e8adba63dbda210cca4185d9f9876b11b87 (patch)
tree78c1116672b6a3a5385d4c5829e7476344862293
parente7e2bd2a593e95fb8fe7b4020a6822ce9cd8a1ff (diff)
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security/intel/stm: Make sure stm_resource_heap is consistent
When a parallel SMM relocation is being done, there is a good chance that the value for stm_resource_heap is not consistent across processors. Rather than holding (via a lock) processors until this value is set and then flushing the cache so that all processors see the same value, this solution moves the code such that all processors set it, thus maintaining parallelism and keeping the code simple. Change-Id: I2e5385c47124adcd99803337167984b6307af860 Signed-off-by: Eugene Myers <edmyers@tycho.nsa.gov> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55629 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
-rw-r--r--src/security/intel/stm/StmPlatformSmm.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/src/security/intel/stm/StmPlatformSmm.c b/src/security/intel/stm/StmPlatformSmm.c
index 248ccc028a91..3f29afc096be 100644
--- a/src/security/intel/stm/StmPlatformSmm.c
+++ b/src/security/intel/stm/StmPlatformSmm.c
@@ -173,12 +173,15 @@ void stm_setup(uintptr_t mseg, int cpu, int num_cpus, uintptr_t smbase,
return;
}
+ // This code moved here because paralled SMM setup can cause some
+ // processors to get a bad value.
+ addr_calc = mseg - CONFIG_BIOS_RESOURCE_LIST_SIZE;
+ stm_resource_heap = (uint8_t *) addr_calc;
+
if (cpu == 0) {
// need to create the BIOS resource list once
// first calculate the location in SMRAM
- addr_calc = mseg - CONFIG_BIOS_RESOURCE_LIST_SIZE;
- stm_resource_heap = (uint8_t *) addr_calc;
printk(BIOS_DEBUG, "STM: stm_resource_heap located at %p\n",
stm_resource_heap);
//setup the the list