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| author | Subrata Banik <subrata.banik@intel.com> | 2017-07-21 10:06:17 +0530 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-07-21 14:45:31 +0000 |
| commit | 8e39009c57dc92e6970a812ec82a2cee4cb6ced5 (patch) | |
| tree | 533d7e13c88b394db384d806af8f22c80105c6a6 | |
| parent | ba3ae3eead28d1fbae0527abca091a01b6876cb6 (diff) | |
| download | coreboot-8e39009c57dc92e6970a812ec82a2cee4cb6ced5.tar.gz coreboot-8e39009c57dc92e6970a812ec82a2cee4cb6ced5.tar.bz2 coreboot-8e39009c57dc92e6970a812ec82a2cee4cb6ced5.zip | |
common/block/fast_spi: Perform SPI offset read after lock down operation
This patch is to provide an additional read SPI pci offset register
BIOS_CONTROL (BC) - offset 0xDC to ensure that the last write is
successful.
Change-Id: I3b36c1a51ac059227631a04eb62b9a6807ed37b1
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/20615
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
| -rw-r--r-- | src/soc/intel/common/block/fast_spi/fast_spi.c | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/src/soc/intel/common/block/fast_spi/fast_spi.c b/src/soc/intel/common/block/fast_spi/fast_spi.c index 1ef929c77ca9..dd211437981f 100644 --- a/src/soc/intel/common/block/fast_spi/fast_spi.c +++ b/src/soc/intel/common/block/fast_spi/fast_spi.c @@ -67,7 +67,7 @@ void fast_spi_init(void) } /* - * Set FAST_SPIBAR BIOS Control BILD bit. + * Set FAST_SPIBAR BIOS Control register based on input bit field. */ static void fast_spi_set_bios_control_reg(uint8_t bios_cntl_bit) { @@ -81,11 +81,21 @@ static void fast_spi_set_bios_control_reg(uint8_t bios_cntl_bit) } /* + * Ensure an additional read back after performing lock down + */ +static void fast_spi_read_post_write(uint8_t reg) +{ + pci_read_config8(PCH_DEV_SPI, reg); +} + +/* * Set FAST_SPIBAR BIOS Control BILD bit. */ void fast_spi_set_bios_interface_lock_down(void) { fast_spi_set_bios_control_reg(SPIBAR_BIOS_CONTROL_BILD); + + fast_spi_read_post_write(SPIBAR_BIOS_CONTROL); } /* @@ -94,6 +104,9 @@ void fast_spi_set_bios_interface_lock_down(void) void fast_spi_set_lock_enable(void) { fast_spi_set_bios_control_reg(SPIBAR_BIOS_CONTROL_LOCK_ENABLE); + + + fast_spi_read_post_write(SPIBAR_BIOS_CONTROL); } /* @@ -102,6 +115,8 @@ void fast_spi_set_lock_enable(void) void fast_spi_set_eiss(void) { fast_spi_set_bios_control_reg(SPIBAR_BIOS_CONTROL_EISS); + + fast_spi_read_post_write(SPIBAR_BIOS_CONTROL); } /* |