diff options
| author | Jonathan Zhang <jonzhang@fb.com> | 2021-05-03 13:12:23 -0700 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-05-10 14:12:57 +0000 |
| commit | b18e194257c6bb5ffd0d18d3c4a5900286f5397a (patch) | |
| tree | b27c1bdd027b5568502d9278ff4ba8096076471b | |
| parent | ad9270db221bfc31daec30f1e056104d12cfaf2b (diff) | |
| download | coreboot-b18e194257c6bb5ffd0d18d3c4a5900286f5397a.tar.gz coreboot-b18e194257c6bb5ffd0d18d3c4a5900286f5397a.tar.bz2 coreboot-b18e194257c6bb5ffd0d18d3c4a5900286f5397a.zip | |
inteltool: add initial suppot for Sapphire Rapids Scalable Processor
Intel Sapphire Rapids Scalable Processor is a 4th generation
processor of Intel Xeon Scalable Processor family.
Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: Idf492d6e7993b9d55d6cd865e721c81876cee9a4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52863
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | util/inteltool/inteltool.c | 2 | ||||
| -rw-r--r-- | util/inteltool/inteltool.h | 1 |
2 files changed, 3 insertions, 0 deletions
diff --git a/util/inteltool/inteltool.c b/util/inteltool/inteltool.c index d7415b07d283..e807cb148d16 100644 --- a/util/inteltool/inteltool.c +++ b/util/inteltool/inteltool.c @@ -142,6 +142,8 @@ static const struct { "10th generation (Comet Lake family) Core Processor (Mobile)" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HEWITTLAKE, "Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D (Hewitt Lake)" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SAPPHIRERAPIDS_SP, + "Xeon Scalable Processor 4th generation (Sapphire Rapids SP)" }, /* Southbridges (LPC controllers) */ { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371XX, "371AB/EB/MB" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10, "ICH10" }, diff --git a/util/inteltool/inteltool.h b/util/inteltool/inteltool.h index a528485bf06b..c362550fa5a1 100644 --- a/util/inteltool/inteltool.h +++ b/util/inteltool/inteltool.h @@ -299,6 +299,7 @@ static inline uint32_t inl(unsigned port) #define PCI_DEVICE_ID_INTEL_CORE_CML_U2 0x9b61 /* Cometlake U (Mobile) */ #define PCI_DEVICE_ID_INTEL_CORE_CML_U3 0x9b71 /* Cometlake U (Mobile) */ #define PCI_DEVICE_ID_INTEL_HEWITTLAKE 0x6f00 /* Hewitt Lake */ +#define PCI_DEVICE_ID_INTEL_SAPPHIRERAPIDS_SP 0x09a2 /* Sapphire Rapids SP */ /* Intel GPUs */ |