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authorMichael Niewöhner <foss@mniewoehner.de>2020-07-20 23:27:27 +0200
committerMichael Niewöhner <c0d3z3r0@review.coreboot.org>2020-08-30 23:13:47 +0000
commit1c97793b79cb68894d9600fee15fed7bf2d399c8 (patch)
treee5fb815d443434d2af3012597a594bd7e6611846
parent8e2101d43850ca30eb185e143381641628d698f6 (diff)
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mb/system76/lemp9: gpio: add a pull-down for MODEM_CLKREQ / CNVI_CLKREQ
MODEM_CLKREQ / CNVI_CLKREQ has no external pull-down resistor. When there is no M.2 card populated, the pin is floating. Thus enable an internal 20K PD. Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Change-Id: I37e0a9d7e9e0a8c8a7ac198abfd3995b8b0f9e3e Reviewed-on: https://review.coreboot.org/c/coreboot/+/43651 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
-rw-r--r--src/mainboard/system76/lemp9/gpio.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/system76/lemp9/gpio.h b/src/mainboard/system76/lemp9/gpio.h
index 645cdfde0983..9c99f13b642e 100644
--- a/src/mainboard/system76/lemp9/gpio.h
+++ b/src/mainboard/system76/lemp9/gpio.h
@@ -467,7 +467,7 @@ static const struct pad_config gpio_table[] = {
// CNV_RF_RESET# / CNVI_RST#
PAD_CFG_NF(GPP_H1, NONE, DEEP, NF3),
// MODEM_CLKREQ / CNVI_CLKREQ
- PAD_CFG_NF(GPP_H2, NONE, DEEP, NF3),
+ PAD_CFG_NF(GPP_H2, DN_20K, DEEP, NF3),
// NC
PAD_NC(GPP_H3, UP_20K),