diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2021-11-05 17:57:13 +0100 |
|---|---|---|
| committer | Paul Fagerburg <pfagerburg@chromium.org> | 2021-11-08 14:48:27 +0000 |
| commit | 6ea031146917e8acbeaba1ba7baf28b7eb03c231 (patch) | |
| tree | 47a18e11e3de340f8b5897573142d315f941360f | |
| parent | 43e269239e43ad15b7324950e4b986a58abe766b (diff) | |
| download | coreboot-6ea031146917e8acbeaba1ba7baf28b7eb03c231.tar.gz coreboot-6ea031146917e8acbeaba1ba7baf28b7eb03c231.tar.bz2 coreboot-6ea031146917e8acbeaba1ba7baf28b7eb03c231.zip | |
soc/amd/picasso/include/southbridge: drop unused aoac_devs struct
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ida8d767a5b56bdf59747362ddf68372436573895
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58972
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/soc/amd/picasso/include/soc/southbridge.h | 16 |
1 files changed, 0 insertions, 16 deletions
diff --git a/src/soc/amd/picasso/include/soc/southbridge.h b/src/soc/amd/picasso/include/soc/southbridge.h index 2cc1c62bb3eb..f547f860a823 100644 --- a/src/soc/amd/picasso/include/soc/southbridge.h +++ b/src/soc/amd/picasso/include/soc/southbridge.h @@ -128,22 +128,6 @@ #define SATA_CAPABILITIES_REG 0xfc #define SATA_CAPABILITY_SPM BIT(12) -typedef struct aoac_devs { - unsigned int :7; - unsigned int ic2e:1; /* 7: I2C2 */ - unsigned int ic3e:1; /* 8: I2C3 */ - unsigned int ic4e:1; /* 9: I2C4 */ - unsigned int :1; - unsigned int ut0e:1; /* 11: UART0 */ - unsigned int ut1e:1; /* 12: UART1 */ - unsigned int :3; - unsigned int ut2e:1; /* 16: UART2 */ - unsigned int :9; - unsigned int ut3e:1; /* 26: UART3 */ - unsigned int espi:1; /* 27: ESPI */ - unsigned int :4; -} __packed aoac_devs_t; - void fch_pre_init(void); void fch_early_init(void); void fch_init(void *chip_info); |