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author | Todd Broch <tbroch@chromium.org> | 2018-08-23 16:12:00 -0700 |
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committer | Martin Roth <martinroth@google.com> | 2018-08-27 16:51:44 +0000 |
commit | 79f99f640ca7bc3180386ff1aa5cb7f877e13c44 (patch) | |
tree | fa4da000776ffefc0312dfe871c3acb9f6e9002b | |
parent | 65bba289ee81da76b900719293da762ed78d19e7 (diff) | |
download | coreboot-79f99f640ca7bc3180386ff1aa5cb7f877e13c44.tar.gz coreboot-79f99f640ca7bc3180386ff1aa5cb7f877e13c44.tar.bz2 coreboot-79f99f640ca7bc3180386ff1aa5cb7f877e13c44.zip |
mb/google/poppy/variants/nocturne: Update DPTF parameters
Reduce the CPU passive threshold sample rate from 5 seconds to 1
second so DPTF will react faster to rapid temperature increases.
Signed-off-by: Todd Broch <tbroch@chromium.org>
BUG=b:67459049
BRANCH=nocturne
TEST=manual performance/power testing on nocturne.
No longer see messages like below in syslog,
'CPU3: Package temperature above threshold'
Change-Id: Ic20c718fd3a496db7c7192feec4f230d924cc458
Reviewed-on: https://review.coreboot.org/28324
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r-- | src/mainboard/google/poppy/variants/nocturne/include/variant/acpi/dptf.asl | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/poppy/variants/nocturne/include/variant/acpi/dptf.asl b/src/mainboard/google/poppy/variants/nocturne/include/variant/acpi/dptf.asl index 7318dc51322d..c8bafb4453df 100644 --- a/src/mainboard/google/poppy/variants/nocturne/include/variant/acpi/dptf.asl +++ b/src/mainboard/google/poppy/variants/nocturne/include/variant/acpi/dptf.asl @@ -50,7 +50,7 @@ Name (CHPS, Package () { Name (DTRT, Package () { /* CPU Throttle Effect on CPU */ - Package () { \_SB.PCI0.B0D4, \_SB.PCI0.B0D4, 100, 50, 0, 0, 0, 0 }, + Package () { \_SB.PCI0.B0D4, \_SB.PCI0.B0D4, 100, 10, 0, 0, 0, 0 }, /* CPU Throttle Effect on Ambient (TSR0) */ Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR0, 100, 600, 0, 0, 0, 0 }, |