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authorAngel Pons <th3fanbus@gmail.com>2021-11-03 13:07:14 +0100
committerFelix Held <felix-coreboot@felixheld.de>2021-11-04 17:32:06 +0000
commitf32ae10f0d62e646cc196f8eb2bb841f60cbe9d6 (patch)
treea5dda13e1c8cd0a3e176f08e03c4c403ba7f3f25
parent5065ad1f6980663a2399b06a6a29a1312d7e46e2 (diff)
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sb/intel: Replace bad uses of `find_resource`
The `find_resource` function will never return null (will die instead). In cases where the existing code already accounts for null pointers, it is better to use `probe_resource` instead, which returns a null pointer instead of dying. Change-Id: I13c7ebeba2e5a896d46231b5e176e5470da97343 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58905 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
-rw-r--r--src/southbridge/intel/bd82x6x/azalia.c2
-rw-r--r--src/southbridge/intel/bd82x6x/me_common.c2
-rw-r--r--src/southbridge/intel/bd82x6x/smbus.c2
-rw-r--r--src/southbridge/intel/bd82x6x/usb_ehci.c2
-rw-r--r--src/southbridge/intel/i82801gx/azalia.c2
-rw-r--r--src/southbridge/intel/i82801gx/sata.c2
-rw-r--r--src/southbridge/intel/i82801ix/azalia.c2
-rw-r--r--src/southbridge/intel/i82801jx/azalia.c2
-rw-r--r--src/southbridge/intel/ibexpeak/azalia.c2
-rw-r--r--src/southbridge/intel/ibexpeak/me.c2
-rw-r--r--src/southbridge/intel/ibexpeak/smbus.c2
-rw-r--r--src/southbridge/intel/ibexpeak/thermal.c2
-rw-r--r--src/southbridge/intel/ibexpeak/usb_ehci.c2
-rw-r--r--src/southbridge/intel/lynxpoint/azalia.c2
-rw-r--r--src/southbridge/intel/lynxpoint/me.c2
-rw-r--r--src/southbridge/intel/lynxpoint/serialio.c4
-rw-r--r--src/southbridge/intel/lynxpoint/smbus.c2
17 files changed, 18 insertions, 18 deletions
diff --git a/src/southbridge/intel/bd82x6x/azalia.c b/src/southbridge/intel/bd82x6x/azalia.c
index 3b07a1529816..1e58dfd31983 100644
--- a/src/southbridge/intel/bd82x6x/azalia.c
+++ b/src/southbridge/intel/bd82x6x/azalia.c
@@ -158,7 +158,7 @@ static void azalia_init(struct device *dev)
u32 codec_mask;
u32 reg32;
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
+ res = probe_resource(dev, PCI_BASE_ADDRESS_0);
if (!res)
return;
diff --git a/src/southbridge/intel/bd82x6x/me_common.c b/src/southbridge/intel/bd82x6x/me_common.c
index 177d581103bb..cf322ebcb970 100644
--- a/src/southbridge/intel/bd82x6x/me_common.c
+++ b/src/southbridge/intel/bd82x6x/me_common.c
@@ -336,7 +336,7 @@ int intel_mei_setup(struct device *dev)
struct mei_csr host;
/* Find the MMIO base for the ME interface */
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
+ res = probe_resource(dev, PCI_BASE_ADDRESS_0);
if (!res || res->base == 0 || res->size == 0) {
printk(BIOS_DEBUG, "ME: MEI resource not present!\n");
return -1;
diff --git a/src/southbridge/intel/bd82x6x/smbus.c b/src/southbridge/intel/bd82x6x/smbus.c
index 839b0c3df045..0ae1f4ab2836 100644
--- a/src/southbridge/intel/bd82x6x/smbus.c
+++ b/src/southbridge/intel/bd82x6x/smbus.c
@@ -19,7 +19,7 @@ static void pch_smbus_init(struct device *dev)
pci_and_config16(dev, 0x80, ~((1 << 8) | (1 << 10) | (1 << 12) | (1 << 14)));
/* Set Receive Slave Address */
- res = find_resource(dev, PCI_BASE_ADDRESS_4);
+ res = probe_resource(dev, PCI_BASE_ADDRESS_4);
if (res)
smbus_set_slave_addr(res->base, SMBUS_SLAVE_ADDR);
}
diff --git a/src/southbridge/intel/bd82x6x/usb_ehci.c b/src/southbridge/intel/bd82x6x/usb_ehci.c
index 8bc45f69dac9..27648616517f 100644
--- a/src/southbridge/intel/bd82x6x/usb_ehci.c
+++ b/src/southbridge/intel/bd82x6x/usb_ehci.c
@@ -43,7 +43,7 @@ static void usb_ehci_init(struct device *dev)
/* Enable writes to protected registers. */
pci_write_config8(dev, 0x80, access_cntl | 1);
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
+ res = probe_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
/* Number of ports and companion controllers. */
reg32 = read32((void *)(uintptr_t)(res->base + 4));
diff --git a/src/southbridge/intel/i82801gx/azalia.c b/src/southbridge/intel/i82801gx/azalia.c
index 0473de64de9c..cc5d3455c78d 100644
--- a/src/southbridge/intel/i82801gx/azalia.c
+++ b/src/southbridge/intel/i82801gx/azalia.c
@@ -186,7 +186,7 @@ static void azalia_init(struct device *dev)
// Docking not supported
pci_and_config8(dev, 0x4d, (u8)~(1 << 7)); // Docking Status
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
+ res = probe_resource(dev, PCI_BASE_ADDRESS_0);
if (!res)
return;
diff --git a/src/southbridge/intel/i82801gx/sata.c b/src/southbridge/intel/i82801gx/sata.c
index abb0e2e03e42..d0d8b3bf332b 100644
--- a/src/southbridge/intel/i82801gx/sata.c
+++ b/src/southbridge/intel/i82801gx/sata.c
@@ -130,7 +130,7 @@ static void sata_init(struct device *dev)
/* Interrupt Pin is set by D31IP.PIP */
pci_write_config8(dev, INTR_LN, 0x0a);
- struct resource *ahci_res = find_resource(dev, PCI_BASE_ADDRESS_5);
+ struct resource *ahci_res = probe_resource(dev, PCI_BASE_ADDRESS_5);
if (ahci_res != NULL)
/* write AHCI GHC_PI register */
write32(res2mmio(ahci_res, 0xc, 0), config->sata_ports_implemented);
diff --git a/src/southbridge/intel/i82801ix/azalia.c b/src/southbridge/intel/i82801ix/azalia.c
index 90d784cd652f..2646cbc72bcc 100644
--- a/src/southbridge/intel/i82801ix/azalia.c
+++ b/src/southbridge/intel/i82801ix/azalia.c
@@ -179,7 +179,7 @@ static void azalia_init(struct device *dev)
/* Lock some R/WO bits by writing their current value. */
pci_update_config32(dev, 0x74, ~0, 0);
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
+ res = probe_resource(dev, PCI_BASE_ADDRESS_0);
if (!res)
return;
diff --git a/src/southbridge/intel/i82801jx/azalia.c b/src/southbridge/intel/i82801jx/azalia.c
index 885c332f8f55..500c004ff115 100644
--- a/src/southbridge/intel/i82801jx/azalia.c
+++ b/src/southbridge/intel/i82801jx/azalia.c
@@ -179,7 +179,7 @@ static void azalia_init(struct device *dev)
/* Lock some R/WO bits by writing their current value. */
pci_update_config32(dev, 0x74, ~0, 0);
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
+ res = probe_resource(dev, PCI_BASE_ADDRESS_0);
if (!res)
return;
diff --git a/src/southbridge/intel/ibexpeak/azalia.c b/src/southbridge/intel/ibexpeak/azalia.c
index 683715fd6bd9..5eb1ac3633de 100644
--- a/src/southbridge/intel/ibexpeak/azalia.c
+++ b/src/southbridge/intel/ibexpeak/azalia.c
@@ -158,7 +158,7 @@ static void azalia_init(struct device *dev)
u32 reg32;
/* Find base address */
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
+ res = probe_resource(dev, PCI_BASE_ADDRESS_0);
if (!res)
return;
diff --git a/src/southbridge/intel/ibexpeak/me.c b/src/southbridge/intel/ibexpeak/me.c
index 20b8aac94a13..74b386169aa2 100644
--- a/src/southbridge/intel/ibexpeak/me.c
+++ b/src/southbridge/intel/ibexpeak/me.c
@@ -395,7 +395,7 @@ static int intel_mei_setup(struct device *dev)
u16 reg16;
/* Find the MMIO base for the ME interface */
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
+ res = probe_resource(dev, PCI_BASE_ADDRESS_0);
if (!res || res->base == 0 || res->size == 0) {
printk(BIOS_DEBUG, "ME: MEI resource not present!\n");
return -1;
diff --git a/src/southbridge/intel/ibexpeak/smbus.c b/src/southbridge/intel/ibexpeak/smbus.c
index 12734a0ce6cb..66523256b946 100644
--- a/src/southbridge/intel/ibexpeak/smbus.c
+++ b/src/southbridge/intel/ibexpeak/smbus.c
@@ -19,7 +19,7 @@ static void pch_smbus_init(struct device *dev)
pci_and_config16(dev, 0x80, ~((1 << 8) | (1 << 10) | (1 << 12) | (1 << 14)));
/* Set Receive Slave Address */
- res = find_resource(dev, PCI_BASE_ADDRESS_4);
+ res = probe_resource(dev, PCI_BASE_ADDRESS_4);
if (res)
smbus_set_slave_addr(res->base, SMBUS_SLAVE_ADDR);
}
diff --git a/src/southbridge/intel/ibexpeak/thermal.c b/src/southbridge/intel/ibexpeak/thermal.c
index 142d3c7d6d21..b96833cb544f 100644
--- a/src/southbridge/intel/ibexpeak/thermal.c
+++ b/src/southbridge/intel/ibexpeak/thermal.c
@@ -14,7 +14,7 @@ static void thermal_init(struct device *dev)
u8 *base;
printk(BIOS_DEBUG, "Thermal init start.\n");
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
+ res = probe_resource(dev, PCI_BASE_ADDRESS_0);
if (!res)
return;
diff --git a/src/southbridge/intel/ibexpeak/usb_ehci.c b/src/southbridge/intel/ibexpeak/usb_ehci.c
index a2adc5aab781..3de8c3365264 100644
--- a/src/southbridge/intel/ibexpeak/usb_ehci.c
+++ b/src/southbridge/intel/ibexpeak/usb_ehci.c
@@ -36,7 +36,7 @@ static void usb_ehci_init(struct device *dev)
/* Enable writes to protected registers. */
pci_write_config8(dev, 0x80, access_cntl | 1);
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
+ res = probe_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
/* Number of ports and companion controllers. */
reg32 = read32((u32 *)(uintptr_t)(res->base + 4));
diff --git a/src/southbridge/intel/lynxpoint/azalia.c b/src/southbridge/intel/lynxpoint/azalia.c
index 27ee9248a289..fe5c4c9fdd84 100644
--- a/src/southbridge/intel/lynxpoint/azalia.c
+++ b/src/southbridge/intel/lynxpoint/azalia.c
@@ -101,7 +101,7 @@ static void azalia_init(struct device *dev)
u32 codec_mask;
/* Find base address */
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
+ res = probe_resource(dev, PCI_BASE_ADDRESS_0);
if (!res)
return;
diff --git a/src/southbridge/intel/lynxpoint/me.c b/src/southbridge/intel/lynxpoint/me.c
index 886fd90e9ecc..c2f1db212251 100644
--- a/src/southbridge/intel/lynxpoint/me.c
+++ b/src/southbridge/intel/lynxpoint/me.c
@@ -670,7 +670,7 @@ static int intel_mei_setup(struct device *dev)
struct mei_csr host;
/* Find the MMIO base for the ME interface */
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
+ res = probe_resource(dev, PCI_BASE_ADDRESS_0);
if (!res || res->base == 0 || res->size == 0) {
printk(BIOS_DEBUG, "ME: MEI resource not present!\n");
return -1;
diff --git a/src/southbridge/intel/lynxpoint/serialio.c b/src/southbridge/intel/lynxpoint/serialio.c
index 34f8c78c6d7c..0aa683d6333b 100644
--- a/src/southbridge/intel/lynxpoint/serialio.c
+++ b/src/southbridge/intel/lynxpoint/serialio.c
@@ -166,10 +166,10 @@ static void serialio_init(struct device *dev)
pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
/* Find BAR0 and BAR1 */
- bar0 = find_resource(dev, PCI_BASE_ADDRESS_0);
+ bar0 = probe_resource(dev, PCI_BASE_ADDRESS_0);
if (!bar0)
return;
- bar1 = find_resource(dev, PCI_BASE_ADDRESS_1);
+ bar1 = probe_resource(dev, PCI_BASE_ADDRESS_1);
if (!bar1)
return;
diff --git a/src/southbridge/intel/lynxpoint/smbus.c b/src/southbridge/intel/lynxpoint/smbus.c
index d55aa6e3d085..f41e322b8216 100644
--- a/src/southbridge/intel/lynxpoint/smbus.c
+++ b/src/southbridge/intel/lynxpoint/smbus.c
@@ -18,7 +18,7 @@ static void pch_smbus_init(struct device *dev)
pci_and_config16(dev, 0x80, ~((1 << 8) | (1 << 10) | (1 << 12) | (1 << 14)));
/* Set Receive Slave Address */
- res = find_resource(dev, PCI_BASE_ADDRESS_4);
+ res = probe_resource(dev, PCI_BASE_ADDRESS_4);
if (res)
smbus_set_slave_addr(res->base, SMBUS_SLAVE_ADDR);
}