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| author | Elyes Haouas <ehaouas@noos.fr> | 2022-02-14 09:27:48 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-22 21:23:24 +0000 |
| commit | 6d508dfc2d19f7945aaec30a60c106e25fb1fa49 (patch) | |
| tree | 5f8c72fa2400608aa8430bf03e4886e50e5b90a7 | |
| parent | 8f38e5f5dc88aa8f2bd5d2a49c4761aca2817de7 (diff) | |
| download | coreboot-6d508dfc2d19f7945aaec30a60c106e25fb1fa49.tar.gz coreboot-6d508dfc2d19f7945aaec30a60c106e25fb1fa49.tar.bz2 coreboot-6d508dfc2d19f7945aaec30a60c106e25fb1fa49.zip | |
mb/lenovo/g505s: Format code
Change-Id: I9cce00e1634d62a63b3563d54a7a0c56058d0e39
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61920
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
| -rw-r--r-- | src/mainboard/lenovo/g505s/OemCustomize.c | 17 | ||||
| -rw-r--r-- | src/mainboard/lenovo/g505s/acpi/mainboard.asl | 1 | ||||
| -rw-r--r-- | src/mainboard/lenovo/g505s/mainboard.c | 1 |
3 files changed, 8 insertions, 11 deletions
diff --git a/src/mainboard/lenovo/g505s/OemCustomize.c b/src/mainboard/lenovo/g505s/OemCustomize.c index 21a0941ccdb9..80daf19afedb 100644 --- a/src/mainboard/lenovo/g505s/OemCustomize.c +++ b/src/mainboard/lenovo/g505s/OemCustomize.c @@ -182,15 +182,14 @@ void board_BeforeInitEarly(struct sysinfo *cb, AMD_EARLY_PARAMS *InitEarly) * data from the table. Otherwise, it will use its default conservative settings */ static CONST PSO_ENTRY ROMDATA PlatformMemoryTable[] = { - - NUMBER_OF_DIMMS_SUPPORTED(ANY_SOCKET, ANY_CHANNEL, 1), - NUMBER_OF_CHANNELS_SUPPORTED(ANY_SOCKET, 2), - MEMCLK_DIS_MAP(ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00), - CKE_TRI_MAP(ANY_SOCKET, ANY_CHANNEL, 0x05, 0x0A), - ODT_TRI_MAP(ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x00, 0x00), - CS_TRI_MAP(ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00), - - PSO_END + NUMBER_OF_DIMMS_SUPPORTED(ANY_SOCKET, ANY_CHANNEL, 1), + NUMBER_OF_CHANNELS_SUPPORTED(ANY_SOCKET, 2), + MEMCLK_DIS_MAP(ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00), + CKE_TRI_MAP(ANY_SOCKET, ANY_CHANNEL, 0x05, 0x0A), + ODT_TRI_MAP(ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x00, 0x00), + CS_TRI_MAP(ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00), + + PSO_END }; void board_BeforeInitPost(struct sysinfo *cb, AMD_POST_PARAMS *InitPost) diff --git a/src/mainboard/lenovo/g505s/acpi/mainboard.asl b/src/mainboard/lenovo/g505s/acpi/mainboard.asl index 467a4f56deda..36f82a33358d 100644 --- a/src/mainboard/lenovo/g505s/acpi/mainboard.asl +++ b/src/mainboard/lenovo/g505s/acpi/mainboard.asl @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ - /* AcpiGpe0Blk */ OperationRegion(GP0B, SystemMemory, 0xfed80814, 0x04) Field(GP0B, ByteAcc, NoLock, Preserve) { diff --git a/src/mainboard/lenovo/g505s/mainboard.c b/src/mainboard/lenovo/g505s/mainboard.c index 90639af7f432..c1ed48652cfc 100644 --- a/src/mainboard/lenovo/g505s/mainboard.c +++ b/src/mainboard/lenovo/g505s/mainboard.c @@ -26,7 +26,6 @@ static const u8 mainboard_intr_data[0x54] = { 0x10, 0x11, 0x12, 0x13 }; - static void pavilion_cold_boot_init(void) { /* Lid SMI is only used in non-ACPI mode; leave it off in S3 resume */ |