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| author | Elyes Haouas <ehaouas@noos.fr> | 2022-02-11 21:58:16 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-22 21:18:24 +0000 |
| commit | 8f38e5f5dc88aa8f2bd5d2a49c4761aca2817de7 (patch) | |
| tree | 3d3ebde0abc946856a0a58a685519e762a2e36db | |
| parent | 4450bee6b35e356bc60fd30a9b0e9289378da336 (diff) | |
| download | coreboot-8f38e5f5dc88aa8f2bd5d2a49c4761aca2817de7.tar.gz coreboot-8f38e5f5dc88aa8f2bd5d2a49c4761aca2817de7.tar.bz2 coreboot-8f38e5f5dc88aa8f2bd5d2a49c4761aca2817de7.zip | |
sb/amd/cimx/sb800/amd_pci_int_defs.h: Fix serial IRQ INT name in comment
Change-Id: If351d93c47de2ef76fb24525ff6d134b35c5f3fe
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61876
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
| -rw-r--r-- | src/southbridge/amd/cimx/sb800/amd_pci_int_defs.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/southbridge/amd/cimx/sb800/amd_pci_int_defs.h b/src/southbridge/amd/cimx/sb800/amd_pci_int_defs.h index 05ccd08e037b..b3fb37dbc879 100644 --- a/src/southbridge/amd/cimx/sb800/amd_pci_int_defs.h +++ b/src/southbridge/amd/cimx/sb800/amd_pci_int_defs.h @@ -24,9 +24,9 @@ #define PIRQ_MISC1 0x0A /* Miscellaneous1 IRQ Settings */ #define PIRQ_MISC2 0x0B /* Miscellaneous2 IRQ Settings */ #define PIRQ_SIRQA 0x0C /* Serial IRQ INTA */ -#define PIRQ_SIRQB 0x0D /* Serial IRQ INTA */ -#define PIRQ_SIRQC 0x0E /* Serial IRQ INTA */ -#define PIRQ_SIRQD 0x0F /* Serial IRQ INTA */ +#define PIRQ_SIRQB 0x0D /* Serial IRQ INTB */ +#define PIRQ_SIRQC 0x0E /* Serial IRQ INTC */ +#define PIRQ_SIRQD 0x0F /* Serial IRQ INTD */ #define PIRQ_SCI 0x10 /* SCI IRQ */ #define PIRQ_SMBUS 0x11 /* SMBUS 14h.0 */ #define PIRQ_ASF 0x12 /* ASF */ |