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| author | Elyes Haouas <ehaouas@noos.fr> | 2022-02-11 22:19:41 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-22 21:15:39 +0000 |
| commit | 090fcec9456f493eb8019dea5832c592be2df924 (patch) | |
| tree | b6683d9cd13c9f545efcb4e23191fdc89b8324b1 | |
| parent | 2a6cc959eeeacbecd6bc3370115ab99bb6e886d6 (diff) | |
| download | coreboot-090fcec9456f493eb8019dea5832c592be2df924.tar.gz coreboot-090fcec9456f493eb8019dea5832c592be2df924.tar.bz2 coreboot-090fcec9456f493eb8019dea5832c592be2df924.zip | |
southbridge/amd/*/*/reset.c: Reduce stylistic differences
Change-Id: I2f58098e786e9b61b0d059723c375a90559e95a6
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61879
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
| -rw-r--r-- | src/southbridge/amd/agesa/hudson/reset.c | 8 | ||||
| -rw-r--r-- | src/southbridge/amd/cimx/sb800/reset.c | 2 | ||||
| -rw-r--r-- | src/southbridge/amd/pi/hudson/reset.c | 8 |
3 files changed, 9 insertions, 9 deletions
diff --git a/src/southbridge/amd/agesa/hudson/reset.c b/src/southbridge/amd/agesa/hudson/reset.c index 67c19254c6a9..48751a4e643c 100644 --- a/src/southbridge/amd/agesa/hudson/reset.c +++ b/src/southbridge/amd/agesa/hudson/reset.c @@ -7,10 +7,10 @@ #include <cf9_reset.h> #include <reset.h> -#define HT_INIT_CONTROL 0x6c -#define HTIC_ColdR_Detect (1<<4) -#define HTIC_BIOSR_Detect (1<<5) -#define HTIC_INIT_Detect (1<<6) +#define HT_INIT_CONTROL 0x6c +#define HTIC_ColdR_Detect (1<<4) +#define HTIC_BIOSR_Detect (1<<5) +#define HTIC_INIT_Detect (1<<6) void cf9_reset_prepare(void) { diff --git a/src/southbridge/amd/cimx/sb800/reset.c b/src/southbridge/amd/cimx/sb800/reset.c index aad6d2e61606..b04c3e291853 100644 --- a/src/southbridge/amd/cimx/sb800/reset.c +++ b/src/southbridge/amd/cimx/sb800/reset.c @@ -7,7 +7,7 @@ #include <cf9_reset.h> #include <reset.h> -#define HT_INIT_CONTROL 0x6C +#define HT_INIT_CONTROL 0x6c #define HTIC_BIOSR_Detect (1<<5) #define DEV_CDB 0x18 diff --git a/src/southbridge/amd/pi/hudson/reset.c b/src/southbridge/amd/pi/hudson/reset.c index 67c19254c6a9..48751a4e643c 100644 --- a/src/southbridge/amd/pi/hudson/reset.c +++ b/src/southbridge/amd/pi/hudson/reset.c @@ -7,10 +7,10 @@ #include <cf9_reset.h> #include <reset.h> -#define HT_INIT_CONTROL 0x6c -#define HTIC_ColdR_Detect (1<<4) -#define HTIC_BIOSR_Detect (1<<5) -#define HTIC_INIT_Detect (1<<6) +#define HT_INIT_CONTROL 0x6c +#define HTIC_ColdR_Detect (1<<4) +#define HTIC_BIOSR_Detect (1<<5) +#define HTIC_INIT_Detect (1<<6) void cf9_reset_prepare(void) { |