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| author | Terry Chen <terry_chen@wistron.corp-partner.google.com> | 2022-02-22 16:50:00 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-24 01:25:32 +0000 |
| commit | 95f8f92451097ad52ab49affbe21ea5782e6146d (patch) | |
| tree | 628529b908e34ed80b08050b2bcf4a87c922884b | |
| parent | 4cee77bce3d7a7426ccc24b2d7d92f4d87955f38 (diff) | |
| download | coreboot-95f8f92451097ad52ab49affbe21ea5782e6146d.tar.gz coreboot-95f8f92451097ad52ab49affbe21ea5782e6146d.tar.bz2 coreboot-95f8f92451097ad52ab49affbe21ea5782e6146d.zip | |
mb/google/brya: Add SPD configs for Crota
Add a mem_parts_used.txt for Crota, containing the
memory parts used in proto builds. Generate Makefile.inc and
dram_id.generated.txt using part_id_gen.
DRAM Part Name ID to assign
MT62F1G32D4DR-031 WT:B 0 (0000)
MT62F512M32D2DR-031 WT:B 1 (0001)
H9JCNNNBK3MLYR-N6E 1 (0001)
H9JCNNNCP3MLYR-N6E 0 (0000)
K3LKBKB0BM-MGCP 2 (0010)
BUG=b:215443524
TEST=emerge-brya coreboot
Change-Id: I0ff6ffea4b879b6e1287e1e3cb9fd36a80f52ed6
Signed-off-by: Terry Chen <terry_chen@wistron.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62262
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
3 files changed, 21 insertions, 2 deletions
diff --git a/src/mainboard/google/brya/variants/crota/memory/Makefile.inc b/src/mainboard/google/brya/variants/crota/memory/Makefile.inc index eace2e443e20..68c56c9c2a38 100644 --- a/src/mainboard/google/brya/variants/crota/memory/Makefile.inc +++ b/src/mainboard/google/brya/variants/crota/memory/Makefile.inc @@ -1,5 +1,9 @@ # SPDX-License-Identifier: GPL-2.0-or-later # This is an auto-generated file. Do not edit!! -# Add memory parts in mem_parts_used.txt and run spd_tools to regenerate. +# Generated by: +# ./util/spd_tools/bin/part_id_gen ADL lp5 src/mainboard/google/brya/variants/crota/memory src/mainboard/google/brya/variants/crota/memory/mem_parts_used.txt -SPD_SOURCES = placeholder +SPD_SOURCES = +SPD_SOURCES += spd/lp5/set-0/spd-2.hex # ID = 0(0b0000) Parts = MT62F1G32D4DR-031 WT:B, H9JCNNNCP3MLYR-N6E +SPD_SOURCES += spd/lp5/set-0/spd-1.hex # ID = 1(0b0001) Parts = MT62F512M32D2DR-031 WT:B, H9JCNNNBK3MLYR-N6E +SPD_SOURCES += spd/lp5/set-0/spd-3.hex # ID = 2(0b0010) Parts = K3LKBKB0BM-MGCP diff --git a/src/mainboard/google/brya/variants/crota/memory/dram_id.generated.txt b/src/mainboard/google/brya/variants/crota/memory/dram_id.generated.txt index fa247902eeee..a61fae8a3995 100644 --- a/src/mainboard/google/brya/variants/crota/memory/dram_id.generated.txt +++ b/src/mainboard/google/brya/variants/crota/memory/dram_id.generated.txt @@ -1 +1,11 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# This is an auto-generated file. Do not edit!! +# Generated by: +# ./util/spd_tools/bin/part_id_gen ADL lp5 src/mainboard/google/brya/variants/crota/memory src/mainboard/google/brya/variants/crota/memory/mem_parts_used.txt + DRAM Part Name ID to assign +MT62F1G32D4DR-031 WT:B 0 (0000) +MT62F512M32D2DR-031 WT:B 1 (0001) +H9JCNNNBK3MLYR-N6E 1 (0001) +H9JCNNNCP3MLYR-N6E 0 (0000) +K3LKBKB0BM-MGCP 2 (0010) diff --git a/src/mainboard/google/brya/variants/crota/memory/mem_parts_used.txt b/src/mainboard/google/brya/variants/crota/memory/mem_parts_used.txt index 96211370d91b..d51ce0eaefb3 100644 --- a/src/mainboard/google/brya/variants/crota/memory/mem_parts_used.txt +++ b/src/mainboard/google/brya/variants/crota/memory/mem_parts_used.txt @@ -9,3 +9,8 @@ # See util/spd_tools/README.md for more details and instructions. # Part Name +MT62F1G32D4DR-031 WT:B +MT62F512M32D2DR-031 WT:B +H9JCNNNBK3MLYR-N6E +H9JCNNNCP3MLYR-N6E +K3LKBKB0BM-MGCP |