soc/mediatek/mt8186: Add mtcmos power-on control for ADSP

To use SOF correctly, we need to enable power domain of ADSP.

TEST=SOF driver is functional.
BUG=b:204229221

Signed-off-by: Mandy Liu <mandyjh.liu@mediatek.com>
Change-Id: I39d1357af5f901a91379fdf7e595f16952b962de
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68288
Reviewed-by: Yidi Lin <yidilin@google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

4 files changed, 44 insertions, 1 deletions

diff --git a/src/soc/mediatek/common/include/soc/mtcmos.h b/src/soc/mediatek/common/include/soc/mtcmos.h
index 20de4ea841ce..ce8e13e39195 100644
--- a/src/soc/mediatek/common/include/soc/mtcmos.h
+++ b/src/soc/mediatek/common/include/soc/mtcmos.h
@@ -13,9 +13,12 @@ struct power_domain_data {
 
 #define SCPD_SRAM_ISO	(1U << 0)
 
+void mtcmos_power_on(const struct power_domain_data *pd);
+void mtcmos_adsp_power_on(void);
 void mtcmos_audio_power_on(void);
 void mtcmos_display_power_on(void);
 
+void mtcmos_protect_adsp_bus(void);
 void mtcmos_protect_audio_bus(void);
 void mtcmos_protect_display_bus(void);
 
diff --git a/src/soc/mediatek/common/mtcmos.c b/src/soc/mediatek/common/mtcmos.c
index 6be7b1c6bd4e..52bd46810e69 100644
--- a/src/soc/mediatek/common/mtcmos.c
+++ b/src/soc/mediatek/common/mtcmos.c
@@ -14,7 +14,7 @@ enum {
 	PWR_RST_B	= 1U << 0
 };
 
-static void mtcmos_power_on(const struct power_domain_data *pd)
+void mtcmos_power_on(const struct power_domain_data *pd)
 {
 	write32(&mtk_spm->poweron_config_set,
 		(SPM_PROJECT_CODE << 16) | (1U << 0));
diff --git a/src/soc/mediatek/mt8186/include/soc/spm.h b/src/soc/mediatek/mt8186/include/soc/spm.h
index 8b8f9b2f23ad..b402b2cff02a 100644
--- a/src/soc/mediatek/mt8186/include/soc/spm.h
+++ b/src/soc/mediatek/mt8186/include/soc/spm.h
@@ -867,4 +867,22 @@ static const struct power_domain_data disp[] = {
 static const struct power_domain_data audio[] = {
 };
 
+static const struct power_domain_data adsp[] = {
+	{
+		.pwr_con = &mtk_spm->adsp_ao_pwr_con,
+		.pwr_sta_mask = 0x1 << 17,
+	},
+	{
+		.pwr_con = &mtk_spm->adsp_infra_pwr_con,
+		.pwr_sta_mask = 0x1 << 10,
+	},
+	{
+		.pwr_con = &mtk_spm->adsp_pwr_con,
+		.pwr_sta_mask = 0x1 << 31,
+		.sram_pdn_mask = 0x1 << 8,
+		.sram_ack_mask = 0x1 << 12,
+		.caps = SCPD_SRAM_ISO,
+	},
+};
+
 #endif  /* SOC_MEDIATEK_MT8186_SPM_H */
diff --git a/src/soc/mediatek/mt8186/mtcmos.c b/src/soc/mediatek/mt8186/mtcmos.c
index 314edd536e6b..621be2776b07 100644
--- a/src/soc/mediatek/mt8186/mtcmos.c
+++ b/src/soc/mediatek/mt8186/mtcmos.c
@@ -3,12 +3,26 @@
 #include <device/mmio.h>
 #include <soc/infracfg.h>
 #include <soc/mtcmos.h>
+#include <soc/spm.h>
 
 enum {
 	DISP_PROT_STEP_2_MASK		= 0x00000C06,
 	DISP_PROT_STEP_1_MASK		= 0x00001800,
 };
 
+enum {
+	TOP_AXI_PROT_EN_3_ADSP_TOP_STEP1	= 0x00001800,
+	TOP_AXI_PROT_EN_3_ADSP_TOP_STEP2	= 0x00000003,
+};
+
+void mtcmos_adsp_power_on(void)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(adsp); i++)
+		mtcmos_power_on(&adsp[i]);
+}
+
 void mtcmos_protect_display_bus(void)
 {
 	write32(&mt8186_infracfg_ao->infra_topaxi_protecten_clr,
@@ -21,3 +35,11 @@ void mtcmos_protect_audio_bus(void)
 {
 	/* No need to do protection since MT8186 doesn't have audio mtcmos. */
 }
+
+void mtcmos_protect_adsp_bus(void)
+{
+	write32(&mt8186_infracfg_ao->infra_topaxi_protecten_3_clr,
+		TOP_AXI_PROT_EN_3_ADSP_TOP_STEP2);
+	write32(&mt8186_infracfg_ao->infra_topaxi_protecten_3_clr,
+		TOP_AXI_PROT_EN_3_ADSP_TOP_STEP1);
+}