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| author | Ian Feng <ian_feng@compal.corp-partner.google.com> | 2022-10-03 12:28:31 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-10-14 15:59:14 +0000 |
| commit | 9ace946c2330479fd5fbf33ab4e22a5a4c7687f8 (patch) | |
| tree | 5fc021edf9cebc3d3a2dca03289b8ed28dd2ef3f | |
| parent | 30e8fc1f4e7d4e79b1403acd3679ce08598687c3 (diff) | |
| download | coreboot-9ace946c2330479fd5fbf33ab4e22a5a4c7687f8.tar.gz coreboot-9ace946c2330479fd5fbf33ab4e22a5a4c7687f8.tar.bz2 coreboot-9ace946c2330479fd5fbf33ab4e22a5a4c7687f8.zip | |
mb/google/nissa/var/xivu: Config I2C frequency
1.Change the TPM I2C freqeuncy to 1 MHz for xivu.
2.Config same settings as the baseboard for I2C buses 1-5.
BUG=b:249953477
TEST=On xivu, all timing requirements in the spec are met.
Frequencies:
1. I2C0 (TPM): 974.3 Khz
2. I2C1 (TouchScreen); 375.5 Khz
3. I2C3 （Audio): 389.0 Khz
4. I2C5 (Touchpad): 388.5 Khz
Signed-off-by: Ian Feng <ian_feng@compal.corp-partner.google.com>
Change-Id: I33f712c14978b95f3a4da82d6f1f5fbae1283b17
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68071
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
Reviewed-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
| -rw-r--r-- | src/mainboard/google/brya/variants/xivu/overridetree.cb | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/xivu/overridetree.cb b/src/mainboard/google/brya/variants/xivu/overridetree.cb index f919cef49a6a..fa3d22aca8e8 100644 --- a/src/mainboard/google/brya/variants/xivu/overridetree.cb +++ b/src/mainboard/google/brya/variants/xivu/overridetree.cb @@ -41,6 +41,55 @@ chip soc/intel/alderlake #| I2C3 | Audio | #| I2C5 | Trackpad | #+-------------------+---------------------------+ + register "common_soc_config" = "{ + .i2c[0] = { + .early_init = 1, + .speed = I2C_SPEED_FAST_PLUS, + .speed_config[0] = { + .speed = I2C_SPEED_FAST_PLUS, + .scl_lcnt = 55, + .scl_hcnt = 30, + .sda_hold = 7, + } + }, + .i2c[1] = { + .speed = I2C_SPEED_FAST, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_lcnt = 158, + .scl_hcnt = 79, + .sda_hold = 7, + } + }, + .i2c[2] = { + .speed = I2C_SPEED_FAST, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_lcnt = 158, + .scl_hcnt = 79, + .sda_hold = 7, + } + }, + .i2c[3] = { + .speed = I2C_SPEED_FAST, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_lcnt = 158, + .scl_hcnt = 79, + .sda_hold = 7, + } + }, + .i2c[5] = { + .speed = I2C_SPEED_FAST, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_lcnt = 158, + .scl_hcnt = 79, + .sda_hold = 7, + } + }, + }" + device domain 0 on device ref dtt on chip drivers/intel/dptf |