diff options
author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-11-11 20:52:30 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2018-11-16 09:50:03 +0000 |
commit | ead574ed020063f1e6efe5289669ab67e2a76780 (patch) | |
tree | dcda019fe464217fec69b12e834d9ec24b28f474 | |
parent | be11d9369b364253a29c8c4a7bc9a6288ff7df65 (diff) | |
download | coreboot-ead574ed020063f1e6efe5289669ab67e2a76780.tar.gz coreboot-ead574ed020063f1e6efe5289669ab67e2a76780.tar.bz2 coreboot-ead574ed020063f1e6efe5289669ab67e2a76780.zip |
src: Get rid of duplicated includes
Change-Id: I252a1cd77bf647477edb7dddadb7e527de872439
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/29582
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
89 files changed, 9 insertions, 111 deletions
diff --git a/src/arch/x86/pirq_routing.c b/src/arch/x86/pirq_routing.c index 7aa50d754229..f70594465899 100644 --- a/src/arch/x86/pirq_routing.c +++ b/src/arch/x86/pirq_routing.c @@ -18,7 +18,6 @@ #include <arch/pirq_routing.h> #include <string.h> #include <device/pci.h> -#include <arch/pirq_routing.h> void __weak pirq_assign_irqs(const unsigned char pirq[CONFIG_MAX_PIRQ_LINKS]) { diff --git a/src/commonlib/storage/mmc.c b/src/commonlib/storage/mmc.c index b62c8bed8ed8..fb00892acd5b 100644 --- a/src/commonlib/storage/mmc.c +++ b/src/commonlib/storage/mmc.c @@ -21,7 +21,6 @@ #include <commonlib/storage.h> #include <delay.h> -#include "sd_mmc.h" #include "mmc.h" #include "sd_mmc.h" #include "storage.h" diff --git a/src/lib/prog_loaders.c b/src/lib/prog_loaders.c index 5004a7fd5e5c..a9c9addbc608 100644 --- a/src/lib/prog_loaders.c +++ b/src/lib/prog_loaders.c @@ -29,7 +29,6 @@ #include <stage_cache.h> #include <symbols.h> #include <timestamp.h> -#include <cbfs.h> #include <fit_payload.h> /* Only can represent up to 1 byte less than size_t. */ diff --git a/src/mainboard/advansus/a785e-i/romstage.c b/src/mainboard/advansus/a785e-i/romstage.c index 1454ece5024c..f557772f5715 100644 --- a/src/mainboard/advansus/a785e-i/romstage.c +++ b/src/mainboard/advansus/a785e-i/romstage.c @@ -29,7 +29,6 @@ #include <console/console.h> #include <timestamp.h> #include <cpu/amd/model_10xxx_rev.h> -#include <cpu/x86/lapic.h> #include <arch/cpu.h> #include <commonlib/loglevel.h> #include <cpu/x86/bist.h> diff --git a/src/mainboard/amd/bimini_fam10/romstage.c b/src/mainboard/amd/bimini_fam10/romstage.c index 84513b8166b2..64cafa7bcebe 100644 --- a/src/mainboard/amd/bimini_fam10/romstage.c +++ b/src/mainboard/amd/bimini_fam10/romstage.c @@ -31,7 +31,6 @@ #include <timestamp.h> #include <cpu/amd/model_10xxx_rev.h> #include <lib.h> -#include <cpu/x86/lapic.h> #include <commonlib/loglevel.h> #include <cpu/x86/bist.h> #include <cpu/amd/msr.h> diff --git a/src/mainboard/amd/db-ft3b-lc/romstage.c b/src/mainboard/amd/db-ft3b-lc/romstage.c index 4da974796b9f..4aceeea3ea4a 100644 --- a/src/mainboard/amd/db-ft3b-lc/romstage.c +++ b/src/mainboard/amd/db-ft3b-lc/romstage.c @@ -29,7 +29,6 @@ #include <northbridge/amd/pi/agesawrapper.h> #include <northbridge/amd/pi/agesawrapper_call.h> #include <cpu/x86/bist.h> -#include <cpu/x86/lapic.h> #include <southbridge/amd/pi/hudson/hudson.h> void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) diff --git a/src/mainboard/amd/lamar/mptable.c b/src/mainboard/amd/lamar/mptable.c index 6937de884744..2b6c48571c23 100644 --- a/src/mainboard/amd/lamar/mptable.c +++ b/src/mainboard/amd/lamar/mptable.c @@ -22,7 +22,6 @@ #include <cpu/x86/lapic.h> #include <southbridge/amd/common/amd_pci_util.h> #include <drivers/generic/ioapic/chip.h> -#include <arch/ioapic.h> #include <southbridge/amd/pi/hudson/amd_pci_int_defs.h> #include <northbridge/amd/pi/00630F01/pci_devs.h> diff --git a/src/mainboard/amd/lamar/romstage.c b/src/mainboard/amd/lamar/romstage.c index 136e392335d5..7f811c5abfc0 100644 --- a/src/mainboard/amd/lamar/romstage.c +++ b/src/mainboard/amd/lamar/romstage.c @@ -29,7 +29,6 @@ #include <northbridge/amd/pi/agesawrapper.h> #include <northbridge/amd/pi/agesawrapper_call.h> #include <cpu/x86/bist.h> -#include <cpu/x86/lapic.h> #include <southbridge/amd/common/amd_defs.h> #include <southbridge/amd/pi/hudson/hudson.h> #include <superio/fintek/f81216h/f81216h.h> diff --git a/src/mainboard/amd/mahogany_fam10/romstage.c b/src/mainboard/amd/mahogany_fam10/romstage.c index c0529769430a..b5217369fba4 100644 --- a/src/mainboard/amd/mahogany_fam10/romstage.c +++ b/src/mainboard/amd/mahogany_fam10/romstage.c @@ -33,7 +33,6 @@ #include <timestamp.h> #include <cpu/amd/model_10xxx_rev.h> #include <lib.h> -#include <cpu/x86/lapic.h> #include <commonlib/loglevel.h> #include <cpu/x86/bist.h> #include <superio/ite/common/ite.h> diff --git a/src/mainboard/amd/olivehillplus/romstage.c b/src/mainboard/amd/olivehillplus/romstage.c index 4ad0f6df8173..3cd8b732cdd9 100644 --- a/src/mainboard/amd/olivehillplus/romstage.c +++ b/src/mainboard/amd/olivehillplus/romstage.c @@ -29,7 +29,6 @@ #include <northbridge/amd/pi/agesawrapper.h> #include <northbridge/amd/pi/agesawrapper_call.h> #include <cpu/x86/bist.h> -#include <cpu/x86/lapic.h> #include <southbridge/amd/pi/hudson/hudson.h> void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/mainboard.c b/src/mainboard/amd/serengeti_cheetah_fam10/mainboard.c index 374420d898b8..fee01092a04c 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/mainboard.c +++ b/src/mainboard/amd/serengeti_cheetah_fam10/mainboard.c @@ -13,7 +13,6 @@ #include <device/device.h> #include <arch/acpi.h> -#include <arch/acpi.h> #include <arch/acpigen.h> #include "mainboard.h" diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c index fd02782661b1..a33a68f5683d 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c +++ b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c @@ -32,7 +32,6 @@ #include <cpu/amd/model_10xxx_rev.h> #include <lib.h> #include <spd.h> -#include <cpu/x86/lapic.h> #include <commonlib/loglevel.h> #include <cpu/x86/bist.h> #include <cpu/amd/car.h> diff --git a/src/mainboard/amd/tilapia_fam10/romstage.c b/src/mainboard/amd/tilapia_fam10/romstage.c index 1205de1d0355..5671ccee343e 100644 --- a/src/mainboard/amd/tilapia_fam10/romstage.c +++ b/src/mainboard/amd/tilapia_fam10/romstage.c @@ -31,7 +31,6 @@ #include <timestamp.h> #include <cpu/amd/model_10xxx_rev.h> #include <lib.h> -#include <cpu/x86/lapic.h> #include <commonlib/loglevel.h> #include <cpu/x86/bist.h> #include <superio/ite/common/ite.h> diff --git a/src/mainboard/apple/macbook21/mainboard.c b/src/mainboard/apple/macbook21/mainboard.c index eb963eef196d..49d342753fb9 100644 --- a/src/mainboard/apple/macbook21/mainboard.c +++ b/src/mainboard/apple/macbook21/mainboard.c @@ -21,7 +21,6 @@ #include <device/pci_def.h> #include <device/pci_ops.h> #include <device/pci_ids.h> -#include <arch/io.h> #include <arch/interrupt.h> #include <northbridge/intel/i945/i945.h> #include <arch/x86/include/arch/acpigen.h> diff --git a/src/mainboard/asus/kcma-d8/romstage.c b/src/mainboard/asus/kcma-d8/romstage.c index 8f156bce2336..d7cc9aef20b9 100644 --- a/src/mainboard/asus/kcma-d8/romstage.c +++ b/src/mainboard/asus/kcma-d8/romstage.c @@ -32,7 +32,6 @@ #include <spd.h> #include <cpu/amd/model_10xxx_rev.h> #include <delay.h> -#include <cpu/x86/lapic.h> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83667hg-a/w83667hg-a.h> #include <cpu/x86/bist.h> diff --git a/src/mainboard/asus/kfsn4-dre/get_bus_conf.c b/src/mainboard/asus/kfsn4-dre/get_bus_conf.c index 4b23ca52f07b..5c8c75e9ce23 100644 --- a/src/mainboard/asus/kfsn4-dre/get_bus_conf.c +++ b/src/mainboard/asus/kfsn4-dre/get_bus_conf.c @@ -26,7 +26,6 @@ #include <stdlib.h> #include <cpu/amd/multicore.h> #include <cpu/amd/amdfam10_sysconf.h> -#include <stdlib.h> /* * Global variables for MB layouts and these will be shared by irqtable, diff --git a/src/mainboard/asus/kfsn4-dre/romstage.c b/src/mainboard/asus/kfsn4-dre/romstage.c index 54a76e21fa9d..1c685f28f208 100644 --- a/src/mainboard/asus/kfsn4-dre/romstage.c +++ b/src/mainboard/asus/kfsn4-dre/romstage.c @@ -39,7 +39,6 @@ #include <southbridge/amd/common/reset.h> #include <southbridge/nvidia/ck804/early_smbus.h> #include <delay.h> -#include <cpu/x86/lapic.h> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627thg/w83627thg.h> #include <cpu/x86/bist.h> diff --git a/src/mainboard/asus/kgpe-d16/romstage.c b/src/mainboard/asus/kgpe-d16/romstage.c index 9913462fa028..eb970ca1838e 100644 --- a/src/mainboard/asus/kgpe-d16/romstage.c +++ b/src/mainboard/asus/kgpe-d16/romstage.c @@ -32,7 +32,6 @@ #include <spd.h> #include <cpu/amd/model_10xxx_rev.h> #include <delay.h> -#include <cpu/x86/lapic.h> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83667hg-a/w83667hg-a.h> #include <cpu/x86/bist.h> diff --git a/src/mainboard/asus/m4a78-em/romstage.c b/src/mainboard/asus/m4a78-em/romstage.c index b6c4bdc803a9..5d61b529033d 100644 --- a/src/mainboard/asus/m4a78-em/romstage.c +++ b/src/mainboard/asus/m4a78-em/romstage.c @@ -32,7 +32,6 @@ #include <timestamp.h> #include <cpu/amd/model_10xxx_rev.h> #include <lib.h> -#include <cpu/x86/lapic.h> #include <commonlib/loglevel.h> #include <cpu/x86/bist.h> #include <superio/ite/common/ite.h> diff --git a/src/mainboard/asus/m4a785-m/romstage.c b/src/mainboard/asus/m4a785-m/romstage.c index b9ac888d7a95..80b77e6662be 100644 --- a/src/mainboard/asus/m4a785-m/romstage.c +++ b/src/mainboard/asus/m4a785-m/romstage.c @@ -33,7 +33,6 @@ #include <timestamp.h> #include <cpu/amd/model_10xxx_rev.h> #include <lib.h> -#include <cpu/x86/lapic.h> #include <commonlib/loglevel.h> #include <cpu/x86/bist.h> #include <superio/ite/common/ite.h> diff --git a/src/mainboard/asus/m5a88-v/romstage.c b/src/mainboard/asus/m5a88-v/romstage.c index 8f900ee8cac7..b9268dae1a36 100644 --- a/src/mainboard/asus/m5a88-v/romstage.c +++ b/src/mainboard/asus/m5a88-v/romstage.c @@ -32,7 +32,6 @@ #include <console/console.h> #include <timestamp.h> #include <cpu/amd/model_10xxx_rev.h> -#include <cpu/x86/lapic.h> #include <commonlib/loglevel.h> #include <cpu/x86/bist.h> #include <superio/ite/common/ite.h> diff --git a/src/mainboard/avalue/eax-785e/romstage.c b/src/mainboard/avalue/eax-785e/romstage.c index 22e3c5d1f067..fd810f8c34cf 100644 --- a/src/mainboard/avalue/eax-785e/romstage.c +++ b/src/mainboard/avalue/eax-785e/romstage.c @@ -30,7 +30,6 @@ #include <console/console.h> #include <timestamp.h> #include <cpu/amd/model_10xxx_rev.h> -#include <cpu/x86/lapic.h> #include <commonlib/loglevel.h> #include <cpu/x86/bist.h> #include <superio/winbond/common/winbond.h> diff --git a/src/mainboard/bap/ode_e21XX/romstage.c b/src/mainboard/bap/ode_e21XX/romstage.c index 576a3eefbb45..eefda26b3e3c 100644 --- a/src/mainboard/bap/ode_e21XX/romstage.c +++ b/src/mainboard/bap/ode_e21XX/romstage.c @@ -29,7 +29,6 @@ #include <northbridge/amd/pi/agesawrapper.h> #include <northbridge/amd/pi/agesawrapper_call.h> #include <cpu/x86/bist.h> -#include <cpu/x86/lapic.h> #include <southbridge/amd/pi/hudson/hudson.h> #include <superio/fintek/common/fintek.h> #include <superio/fintek/f81866d/f81866d.h> diff --git a/src/mainboard/cavium/cn8100_sff_evb/mainboard.c b/src/mainboard/cavium/cn8100_sff_evb/mainboard.c index ce896f2f75ca..fd0d9285ed15 100644 --- a/src/mainboard/cavium/cn8100_sff_evb/mainboard.c +++ b/src/mainboard/cavium/cn8100_sff_evb/mainboard.c @@ -25,7 +25,6 @@ #include <soc/uart.h> #include <console/console.h> #include <soc/clock.h> -#include <soc/gpio.h> #include <soc/timer.h> #include <soc/cpu.h> #include <soc/sdram.h> diff --git a/src/mainboard/gigabyte/ma785gm/romstage.c b/src/mainboard/gigabyte/ma785gm/romstage.c index f556a1af198a..1adaad8261c6 100644 --- a/src/mainboard/gigabyte/ma785gm/romstage.c +++ b/src/mainboard/gigabyte/ma785gm/romstage.c @@ -29,7 +29,6 @@ #include <timestamp.h> #include <cpu/amd/model_10xxx_rev.h> #include <lib.h> -#include <cpu/x86/lapic.h> #include <commonlib/loglevel.h> #include <cpu/x86/bist.h> #include <superio/ite/common/ite.h> diff --git a/src/mainboard/gigabyte/ma785gmt/romstage.c b/src/mainboard/gigabyte/ma785gmt/romstage.c index abf862881ccc..41640d9972e4 100644 --- a/src/mainboard/gigabyte/ma785gmt/romstage.c +++ b/src/mainboard/gigabyte/ma785gmt/romstage.c @@ -29,7 +29,6 @@ #include <timestamp.h> #include <cpu/amd/model_10xxx_rev.h> #include <lib.h> -#include <cpu/x86/lapic.h> #include <commonlib/loglevel.h> #include <cpu/x86/bist.h> #include <superio/ite/common/ite.h> diff --git a/src/mainboard/gigabyte/ma78gm/romstage.c b/src/mainboard/gigabyte/ma78gm/romstage.c index f004911faae6..f2abbd0aba33 100644 --- a/src/mainboard/gigabyte/ma78gm/romstage.c +++ b/src/mainboard/gigabyte/ma78gm/romstage.c @@ -32,7 +32,6 @@ #include <timestamp.h> #include <cpu/amd/model_10xxx_rev.h> #include <lib.h> -#include <cpu/x86/lapic.h> #include <commonlib/loglevel.h> #include <cpu/x86/bist.h> #include <superio/ite/common/ite.h> diff --git a/src/mainboard/google/jecht/smihandler.c b/src/mainboard/google/jecht/smihandler.c index 82433542990f..b9a84bf018fd 100644 --- a/src/mainboard/google/jecht/smihandler.c +++ b/src/mainboard/google/jecht/smihandler.c @@ -25,8 +25,6 @@ #include <soc/gpio.h> #include <soc/iomap.h> #include <soc/nvs.h> -#include <soc/pm.h> -#include <soc/smm.h> #include "onboard.h" int mainboard_io_trap_handler(int smif) diff --git a/src/mainboard/hp/dl165_g6_fam10/romstage.c b/src/mainboard/hp/dl165_g6_fam10/romstage.c index ada0d2fd2aba..7a9d37fa3cb7 100644 --- a/src/mainboard/hp/dl165_g6_fam10/romstage.c +++ b/src/mainboard/hp/dl165_g6_fam10/romstage.c @@ -39,7 +39,6 @@ #include <lib.h> #include <spd.h> #include <delay.h> -#include <cpu/x86/lapic.h> #include <superio/serverengines/pilot/pilot.h> #include <superio/nsc/pc87417/pc87417.h> #include <cpu/x86/bist.h> diff --git a/src/mainboard/iei/kino-780am2-fam10/romstage.c b/src/mainboard/iei/kino-780am2-fam10/romstage.c index 4a6d011aa638..52cbe4bd310c 100644 --- a/src/mainboard/iei/kino-780am2-fam10/romstage.c +++ b/src/mainboard/iei/kino-780am2-fam10/romstage.c @@ -32,7 +32,6 @@ #include <timestamp.h> #include <cpu/amd/model_10xxx_rev.h> #include <lib.h> -#include <cpu/x86/lapic.h> #include <commonlib/loglevel.h> #include <cpu/x86/bist.h> #include <superio/fintek/common/fintek.h> diff --git a/src/mainboard/jetway/pa78vm5/romstage.c b/src/mainboard/jetway/pa78vm5/romstage.c index b1ac722d3def..9f6c1601ad7e 100644 --- a/src/mainboard/jetway/pa78vm5/romstage.c +++ b/src/mainboard/jetway/pa78vm5/romstage.c @@ -33,7 +33,6 @@ #include <timestamp.h> #include <cpu/amd/model_10xxx_rev.h> #include <lib.h> -#include <cpu/x86/lapic.h> #include <commonlib/loglevel.h> #include <cpu/x86/bist.h> #include <superio/fintek/common/fintek.h> diff --git a/src/mainboard/lenovo/x60/dock.c b/src/mainboard/lenovo/x60/dock.c index f55428e66d0b..b94d8180770d 100644 --- a/src/mainboard/lenovo/x60/dock.c +++ b/src/mainboard/lenovo/x60/dock.c @@ -18,7 +18,6 @@ #include <device/device.h> #include <arch/io.h> #include <delay.h> -#include <arch/io.h> #include "dock.h" #include <southbridge/intel/i82801gx/i82801gx.h> #include <superio/nsc/pc87392/pc87392.h> diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c index cd57c2c39519..803ff3a7660d 100644 --- a/src/mainboard/msi/ms9652_fam10/romstage.c +++ b/src/mainboard/msi/ms9652_fam10/romstage.c @@ -32,7 +32,6 @@ #include <spd.h> #include <cpu/amd/model_10xxx_rev.h> #include <delay.h> -#include <cpu/x86/lapic.h> #include <cpu/amd/car.h> #include <cpu/amd/msr.h> #include <superio/winbond/common/winbond.h> diff --git a/src/mainboard/opencellular/elgon/mainboard.c b/src/mainboard/opencellular/elgon/mainboard.c index 45a715505c82..d140bc1ec90f 100644 --- a/src/mainboard/opencellular/elgon/mainboard.c +++ b/src/mainboard/opencellular/elgon/mainboard.c @@ -24,14 +24,12 @@ #include <soc/uart.h> #include <console/console.h> #include <soc/clock.h> -#include <soc/gpio.h> #include <soc/timer.h> #include <soc/cpu.h> #include <soc/sdram.h> #include <soc/spi.h> #include <spi_flash.h> #include <fmap.h> -#include <libbdk-hal/bdk-config.h> static void mainboard_print_info(void) { diff --git a/src/mainboard/packardbell/ms2290/mainboard.c b/src/mainboard/packardbell/ms2290/mainboard.c index 2691b676f4f9..77a626dfdb9f 100644 --- a/src/mainboard/packardbell/ms2290/mainboard.c +++ b/src/mainboard/packardbell/ms2290/mainboard.c @@ -23,7 +23,6 @@ #include <device/pci_def.h> #include <device/pci_ops.h> #include <device/pci_ids.h> -#include <arch/io.h> #include <northbridge/intel/nehalem/nehalem.h> #include <southbridge/intel/bd82x6x/pch.h> #include <ec/acpi/ec.h> diff --git a/src/mainboard/pcengines/apu2/romstage.c b/src/mainboard/pcengines/apu2/romstage.c index 3c5eed6bb5b8..55a89fb0c299 100644 --- a/src/mainboard/pcengines/apu2/romstage.c +++ b/src/mainboard/pcengines/apu2/romstage.c @@ -31,7 +31,6 @@ #include <northbridge/amd/pi/agesawrapper.h> #include <northbridge/amd/pi/agesawrapper_call.h> #include <cpu/x86/bist.h> -#include <cpu/x86/lapic.h> #include <southbridge/amd/pi/hudson/hudson.h> #include <superio/nuvoton/common/nuvoton.h> #include <superio/nuvoton/nct5104d/nct5104d.h> diff --git a/src/mainboard/supermicro/h8dmr_fam10/romstage.c b/src/mainboard/supermicro/h8dmr_fam10/romstage.c index ec195bf64065..9ad865296211 100644 --- a/src/mainboard/supermicro/h8dmr_fam10/romstage.c +++ b/src/mainboard/supermicro/h8dmr_fam10/romstage.c @@ -32,7 +32,6 @@ #include <spd.h> #include <cpu/amd/model_10xxx_rev.h> #include <delay.h> -#include <cpu/x86/lapic.h> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627hf/w83627hf.h> #include <cpu/x86/bist.h> diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c index c2377128205a..c6e01e6f6469 100644 --- a/src/mainboard/supermicro/h8qme_fam10/romstage.c +++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c @@ -32,7 +32,6 @@ #include <spd.h> #include <cpu/amd/model_10xxx_rev.h> #include <delay.h> -#include <cpu/x86/lapic.h> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627hf/w83627hf.h> #include <cpu/x86/bist.h> diff --git a/src/mainboard/supermicro/h8scm_fam10/romstage.c b/src/mainboard/supermicro/h8scm_fam10/romstage.c index 254672dddacd..dc19870eb5dd 100644 --- a/src/mainboard/supermicro/h8scm_fam10/romstage.c +++ b/src/mainboard/supermicro/h8scm_fam10/romstage.c @@ -32,7 +32,6 @@ #include <timestamp.h> #include <cpu/amd/model_10xxx_rev.h> #include <lib.h> -#include <cpu/x86/lapic.h> #include <commonlib/loglevel.h> #include <cpu/x86/bist.h> #include <cpu/amd/msr.h> diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c index bb360b74c748..aa3b010a5213 100644 --- a/src/mainboard/tyan/s2912_fam10/romstage.c +++ b/src/mainboard/tyan/s2912_fam10/romstage.c @@ -32,7 +32,6 @@ #include <spd.h> #include <cpu/amd/model_10xxx_rev.h> #include <delay.h> -#include <cpu/x86/lapic.h> #include <cpu/amd/car.h> #include <cpu/amd/msr.h> #include <superio/winbond/common/winbond.h> diff --git a/src/mainboard/via/epia-m850/romstage.c b/src/mainboard/via/epia-m850/romstage.c index e75a679f2e30..db03103b0ebc 100644 --- a/src/mainboard/via/epia-m850/romstage.c +++ b/src/mainboard/via/epia-m850/romstage.c @@ -22,7 +22,6 @@ #include <device/pci_ids.h> #include <arch/io.h> #include <device/pnp_def.h> -#include <arch/io.h> #include <console/console.h> #include <lib.h> #include <cpu/x86/bist.h> diff --git a/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c b/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c index 6fd5b364a4ad..eb39c811f924 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c @@ -30,8 +30,6 @@ #include <spi_flash.h> #include <pc80/mc146818rtc.h> #include <inttypes.h> -#include <console/console.h> -#include <string.h> #include "mct_d.h" #include "mct_d_gcc.h" diff --git a/src/northbridge/amd/pi/00630F01/northbridge.c b/src/northbridge/amd/pi/00630F01/northbridge.c index f6cb28565b5f..7a24d11a6520 100644 --- a/src/northbridge/amd/pi/00630F01/northbridge.c +++ b/src/northbridge/amd/pi/00630F01/northbridge.c @@ -33,7 +33,6 @@ #include <cpu/x86/lapic.h> #include <cpu/amd/msr.h> #include <cpu/amd/mtrr.h> -#include <arch/acpi.h> #include <arch/acpigen.h> #include <assert.h> #include <northbridge/amd/agesa/agesa_helper.h> diff --git a/src/northbridge/amd/pi/00660F01/northbridge.c b/src/northbridge/amd/pi/00660F01/northbridge.c index fb3610d1b9e6..826ce3ea4152 100644 --- a/src/northbridge/amd/pi/00660F01/northbridge.c +++ b/src/northbridge/amd/pi/00660F01/northbridge.c @@ -33,7 +33,6 @@ #include <cpu/x86/lapic.h> #include <cpu/amd/msr.h> #include <cpu/amd/mtrr.h> -#include <arch/acpi.h> #include <arch/acpigen.h> #include <northbridge/amd/agesa/agesa_helper.h> #if IS_ENABLED(CONFIG_BINARYPI_LEGACY_WRAPPER) diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c index 7125e1e090a2..804ce6eab587 100644 --- a/src/northbridge/amd/pi/00730F01/northbridge.c +++ b/src/northbridge/amd/pi/00730F01/northbridge.c @@ -35,7 +35,6 @@ #include <cpu/x86/lapic.h> #include <cpu/amd/msr.h> #include <cpu/amd/mtrr.h> -#include <arch/acpi.h> #include <arch/acpigen.h> #include <northbridge/amd/agesa/agesa_helper.h> #if IS_ENABLED(CONFIG_BINARYPI_LEGACY_WRAPPER) diff --git a/src/northbridge/intel/fsp_rangeley/acpi.c b/src/northbridge/intel/fsp_rangeley/acpi.c index c8e6d45481a0..23044b7894cb 100644 --- a/src/northbridge/intel/fsp_rangeley/acpi.c +++ b/src/northbridge/intel/fsp_rangeley/acpi.c @@ -24,7 +24,6 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> -#include <arch/acpi.h> #include <arch/acpigen.h> #include "northbridge.h" diff --git a/src/northbridge/intel/gm45/acpi.c b/src/northbridge/intel/gm45/acpi.c index 18f541f13cab..019c5ffdec04 100644 --- a/src/northbridge/intel/gm45/acpi.c +++ b/src/northbridge/intel/gm45/acpi.c @@ -23,7 +23,6 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <cbmem.h> -#include <arch/acpigen.h> #include "gm45.h" unsigned long acpi_fill_mcfg(unsigned long current) diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c index 405eb5d324b7..a738905cebf8 100644 --- a/src/northbridge/intel/gm45/northbridge.c +++ b/src/northbridge/intel/gm45/northbridge.c @@ -25,7 +25,6 @@ #include <cpu/cpu.h> #include <boot/tables.h> #include <arch/acpi.h> -#include <cbmem.h> #include <cpu/intel/smm/gen1/smi.h> #include "chip.h" #include "gm45.h" diff --git a/src/northbridge/intel/i945/acpi.c b/src/northbridge/intel/i945/acpi.c index f8425089170a..41ebf17dcdc9 100644 --- a/src/northbridge/intel/i945/acpi.c +++ b/src/northbridge/intel/i945/acpi.c @@ -23,7 +23,6 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <cbmem.h> -#include <arch/acpigen.h> #include "i945.h" unsigned long acpi_fill_mcfg(unsigned long current) diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c index de55cc35f236..bec0c58d9bb6 100644 --- a/src/northbridge/intel/i945/northbridge.c +++ b/src/northbridge/intel/i945/northbridge.c @@ -22,7 +22,6 @@ #include <device/pci_ids.h> #include <stdlib.h> #include <string.h> -#include <cbmem.h> #include <cpu/cpu.h> #include <arch/acpi.h> #include "i945.h" diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c index 71d98538da0e..ed93daa8510a 100644 --- a/src/northbridge/intel/i945/raminit.c +++ b/src/northbridge/intel/i945/raminit.c @@ -23,7 +23,6 @@ #include <spd.h> #include <string.h> #include <halt.h> -#include <lib.h> #include "raminit.h" #include "i945.h" #include "chip.h" diff --git a/src/northbridge/intel/x4x/acpi.c b/src/northbridge/intel/x4x/acpi.c index b168ffae6540..c5c31e659911 100644 --- a/src/northbridge/intel/x4x/acpi.c +++ b/src/northbridge/intel/x4x/acpi.c @@ -24,7 +24,6 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <cbmem.h> -#include <arch/acpigen.h> #include "x4x.h" unsigned long acpi_fill_mcfg(unsigned long current) diff --git a/src/northbridge/via/vx900/early_vx900.h b/src/northbridge/via/vx900/early_vx900.h index 11c561a5f3b9..55b6c6976671 100644 --- a/src/northbridge/via/vx900/early_vx900.h +++ b/src/northbridge/via/vx900/early_vx900.h @@ -23,7 +23,6 @@ #include <arch/io.h> #include <cbmem.h> #include <stdint.h> -#include <arch/io.h> /* North Module devices */ #define HOST_CTR PCI_DEV(0, 0, 0) diff --git a/src/northbridge/via/vx900/raminit_ddr3.c b/src/northbridge/via/vx900/raminit_ddr3.c index 17a87bbe97d8..1d05fa731cc5 100644 --- a/src/northbridge/via/vx900/raminit_ddr3.c +++ b/src/northbridge/via/vx900/raminit_ddr3.c @@ -17,7 +17,6 @@ #include "early_vx900.h" #include "raminit.h" #include <arch/io.h> -#include <arch/io.h> #include <console/console.h> #include <device/pci_ids.h> #include <delay.h> diff --git a/src/northbridge/via/vx900/traf_ctrl.c b/src/northbridge/via/vx900/traf_ctrl.c index 8bdf25c828aa..c2b4a480528c 100644 --- a/src/northbridge/via/vx900/traf_ctrl.c +++ b/src/northbridge/via/vx900/traf_ctrl.c @@ -17,8 +17,6 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <console/console.h> -#include <device/pci.h> -#include <device/pci_ids.h> #include <drivers/generic/ioapic/chip.h> #include "vx900.h" diff --git a/src/security/vboot/secdata_tpm.c b/src/security/vboot/secdata_tpm.c index c62f18b96283..f639e35423a6 100644 --- a/src/security/vboot/secdata_tpm.c +++ b/src/security/vboot/secdata_tpm.c @@ -47,7 +47,6 @@ #include <stdio.h> #define VBDEBUG(format, args...) printf(format, ## args) #else -#include <console/console.h> #define VBDEBUG(format, args...) \ printk(BIOS_INFO, "%s():%d: " format, __func__, __LINE__, ## args) #endif diff --git a/src/soc/cavium/cn81xx/soc.c b/src/soc/cavium/cn81xx/soc.c index 8d42d3d931d0..2046d21b11b7 100644 --- a/src/soc/cavium/cn81xx/soc.c +++ b/src/soc/cavium/cn81xx/soc.c @@ -32,7 +32,6 @@ #include <soc/ecam0.h> #include <console/uart.h> #include <libbdk-hal/bdk-pcie.h> -#include <soc/ecam0.h> #include <device/pci.h> #include <libbdk-hal/bdk-qlm.h> #include <libbdk-hal/bdk-config.h> diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index 48a509dfb434..85fe30c7ca0c 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -33,7 +33,6 @@ #include <intelblocks/xdci.h> #include <fsp/api.h> #include <fsp/util.h> -#include <intelblocks/acpi.h> #include <intelblocks/cpulib.h> #include <intelblocks/itss.h> #include <intelblocks/pmclib.h> diff --git a/src/soc/intel/apollolake/include/soc/pci_devs.h b/src/soc/intel/apollolake/include/soc/pci_devs.h index 37d0fab1c011..ad726f8c2c96 100644 --- a/src/soc/intel/apollolake/include/soc/pci_devs.h +++ b/src/soc/intel/apollolake/include/soc/pci_devs.h @@ -23,7 +23,6 @@ #if !defined(__SIMPLE_DEVICE__) #include <device/device.h> -#include <device/pci_def.h> #define _SA_DEV(slot) dev_find_slot(0, _SA_DEVFN(slot)) #define _PCH_DEV(slot, func) dev_find_slot(0, _PCH_DEVFN(slot, func)) #else diff --git a/src/soc/intel/baytrail/acpi.c b/src/soc/intel/baytrail/acpi.c index 336ff696616e..e9934aace291 100644 --- a/src/soc/intel/baytrail/acpi.c +++ b/src/soc/intel/baytrail/acpi.c @@ -21,7 +21,6 @@ #include <cbmem.h> #include <console/console.h> #include <cpu/x86/smm.h> -#include <console/console.h> #include <types.h> #include <string.h> #include <cpu/x86/msr.h> diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c index 3946c15e5c93..c8e08dd8f042 100644 --- a/src/soc/intel/baytrail/southcluster.c +++ b/src/soc/intel/baytrail/southcluster.c @@ -37,7 +37,6 @@ #include <soc/ramstage.h> #include <soc/spi.h> #include "chip.h" -#include <arch/acpi.h> #include <arch/acpigen.h> static inline void diff --git a/src/soc/intel/braswell/romstage/romstage.c b/src/soc/intel/braswell/romstage/romstage.c index 1cbb20bcfc58..12939bfb59c3 100644 --- a/src/soc/intel/braswell/romstage/romstage.c +++ b/src/soc/intel/braswell/romstage/romstage.c @@ -21,7 +21,6 @@ #include <arch/io.h> #include <arch/cbfs.h> #include <arch/stages.h> -#include <cbmem.h> #include <chip.h> #include <cpu/x86/mtrr.h> #include <console/console.h> diff --git a/src/soc/intel/broadwell/lpc.c b/src/soc/intel/broadwell/lpc.c index 8219d5455bd1..87aaf6b8965d 100644 --- a/src/soc/intel/broadwell/lpc.c +++ b/src/soc/intel/broadwell/lpc.c @@ -42,9 +42,7 @@ #include <soc/ramstage.h> #include <soc/rcba.h> #include <soc/intel/broadwell/chip.h> -#include <arch/acpi.h> #include <arch/acpigen.h> -#include <cpu/cpu.h> static void pch_enable_ioapic(struct device *dev) { diff --git a/src/soc/intel/broadwell/refcode.c b/src/soc/intel/broadwell/refcode.c index 7eb548e81732..6d192ccdb671 100644 --- a/src/soc/intel/broadwell/refcode.c +++ b/src/soc/intel/broadwell/refcode.c @@ -22,7 +22,6 @@ #include <program_loading.h> #include <rmodule.h> #include <stage_cache.h> -#include <string.h> #include <soc/pei_data.h> #include <soc/pei_wrapper.h> #include <soc/pm.h> diff --git a/src/soc/intel/cannonlake/include/soc/pci_devs.h b/src/soc/intel/cannonlake/include/soc/pci_devs.h index 63a59db611df..77ae746bd85a 100644 --- a/src/soc/intel/cannonlake/include/soc/pci_devs.h +++ b/src/soc/intel/cannonlake/include/soc/pci_devs.h @@ -25,7 +25,6 @@ #if !defined(__SIMPLE_DEVICE__) #include <device/device.h> -#include <device/pci_def.h> #define _SA_DEV(slot) dev_find_slot(0, _SA_DEVFN(slot)) #define _PCH_DEV(slot, func) dev_find_slot(0, _PCH_DEVFN(slot, func)) #else diff --git a/src/soc/intel/denverton_ns/systemagent.c b/src/soc/intel/denverton_ns/systemagent.c index 6b72a0c1da66..f41714fb41d4 100644 --- a/src/soc/intel/denverton_ns/systemagent.c +++ b/src/soc/intel/denverton_ns/systemagent.c @@ -27,7 +27,6 @@ #include <string.h> #include <cbmem.h> #include <romstage_handoff.h> -#include <delay.h> #include <timer.h> #include <soc/iomap.h> diff --git a/src/soc/intel/fsp_baytrail/acpi.c b/src/soc/intel/fsp_baytrail/acpi.c index 8152bfb5fcf8..a378f5e7c604 100644 --- a/src/soc/intel/fsp_baytrail/acpi.c +++ b/src/soc/intel/fsp_baytrail/acpi.c @@ -35,14 +35,12 @@ #include <string.h> #include <soc/iomap.h> #include <soc/lpc.h> -#include <soc/pci_devs.h> #include <soc/pmc.h> #include <soc/irq.h> #include <soc/iosf.h> #include <arch/io.h> #include <soc/msr.h> #include <soc/pattrs.h> -#include <soc/pmc.h> #include <cbmem.h> #include "chip.h" diff --git a/src/soc/intel/fsp_baytrail/northcluster.c b/src/soc/intel/fsp_baytrail/northcluster.c index f909121eb29c..93cd2f251dc4 100644 --- a/src/soc/intel/fsp_baytrail/northcluster.c +++ b/src/soc/intel/fsp_baytrail/northcluster.c @@ -24,7 +24,6 @@ #include <soc/iosf.h> #include <soc/pci_devs.h> #include <soc/ramstage.h> -#include <device/pci.h> #include <cbmem.h> #include <soc/baytrail.h> #include <drivers/intel/fsp1_0/fsp_util.h> diff --git a/src/soc/intel/icelake/include/soc/pci_devs.h b/src/soc/intel/icelake/include/soc/pci_devs.h index 9b9e4345b88e..94f1d0d7c892 100644 --- a/src/soc/intel/icelake/include/soc/pci_devs.h +++ b/src/soc/intel/icelake/include/soc/pci_devs.h @@ -24,7 +24,6 @@ #if !defined(__SIMPLE_DEVICE__) #include <device/device.h> -#include <device/pci_def.h> #define _SA_DEV(slot) dev_find_slot(0, _SA_DEVFN(slot)) #define _PCH_DEV(slot, func) dev_find_slot(0, _PCH_DEVFN(slot, func)) #else diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c index 7cc6de51f757..8a7834879441 100644 --- a/src/soc/intel/skylake/chip_fsp20.c +++ b/src/soc/intel/skylake/chip_fsp20.c @@ -20,13 +20,9 @@ #include <fsp/api.h> #include <arch/acpi.h> #include <arch/io.h> -#include <chip.h> -#include <bootstate.h> #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <device/pci_ids.h> -#include <fsp/api.h> #include <fsp/util.h> #include <intelblocks/chip.h> #include <intelblocks/itss.h> diff --git a/src/soc/intel/skylake/elog.c b/src/soc/intel/skylake/elog.c index 25a9610b53d1..a2fa52ac1f63 100644 --- a/src/soc/intel/skylake/elog.c +++ b/src/soc/intel/skylake/elog.c @@ -24,7 +24,6 @@ #include <soc/pci_devs.h> #include <soc/pm.h> #include <soc/smbus.h> -#include <stdint.h> static void pch_log_gpio_gpe(u32 gpe0_sts, u32 gpe0_en, int start) { diff --git a/src/soc/intel/skylake/include/soc/pci_devs.h b/src/soc/intel/skylake/include/soc/pci_devs.h index bc6c9cb7b44b..1fc3621ce360 100644 --- a/src/soc/intel/skylake/include/soc/pci_devs.h +++ b/src/soc/intel/skylake/include/soc/pci_devs.h @@ -25,7 +25,6 @@ #if !defined(__SIMPLE_DEVICE__) #include <device/device.h> -#include <device/pci_def.h> #define _SA_DEV(slot) dev_find_slot(0, _SA_DEVFN(slot)) #define _PCH_DEV(slot, func) dev_find_slot(0, _PCH_DEVFN(slot, func)) #else diff --git a/src/soc/nvidia/tegra124/display.c b/src/soc/nvidia/tegra124/display.c index ec3d53730017..ceb1547fd8d2 100644 --- a/src/soc/nvidia/tegra124/display.c +++ b/src/soc/nvidia/tegra124/display.c @@ -29,7 +29,6 @@ #include <soc/nvidia/tegra/pwm.h> #include <stdint.h> #include <stdlib.h> -#include <stdlib.h> #include <string.h> #include "chip.h" diff --git a/src/soc/nvidia/tegra210/sor.c b/src/soc/nvidia/tegra210/sor.c index df5c449e420c..cf34064a92f9 100644 --- a/src/soc/nvidia/tegra210/sor.c +++ b/src/soc/nvidia/tegra210/sor.c @@ -24,7 +24,6 @@ #include <delay.h> #include <soc/addressmap.h> #include <device/device.h> -#include <stdlib.h> #include <string.h> #include <boot/tables.h> #include <cbmem.h> diff --git a/src/southbridge/amd/cimx/sb900/SbPlatform.h b/src/southbridge/amd/cimx/sb900/SbPlatform.h index 578c812ac31a..660553fbd8e9 100644 --- a/src/southbridge/amd/cimx/sb900/SbPlatform.h +++ b/src/southbridge/amd/cimx/sb900/SbPlatform.h @@ -56,7 +56,6 @@ typedef union _PCI_ADDR { #include "SbType.h" #include "AcpiLib.h" #include "SbDef.h" -#include "AmdSbLib.h" #include "SbSubFun.h" #include "platform_cfg.h" /* mainboard specific configuration */ #include <OEM.h> /* platform default configuration */ diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index f1f47d50cff7..7ae538ebd2eb 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -32,7 +32,6 @@ #include <cpu/x86/smm.h> #include <cbmem.h> #include <string.h> -#include <cpu/x86/smm.h> #include "pch.h" #include "nvs.h" #include <southbridge/intel/common/pciehp.h> diff --git a/src/southbridge/intel/bd82x6x/me.c b/src/southbridge/intel/bd82x6x/me.c index da1c7e4d6ec7..1bbce066bfee 100644 --- a/src/southbridge/intel/bd82x6x/me.c +++ b/src/southbridge/intel/bd82x6x/me.c @@ -32,11 +32,9 @@ #include <elog.h> #include <halt.h> -#ifdef __SMM__ -#include <arch/io.h> -#else -# include <device/device.h> -# include <device/pci.h> +#ifndef __SMM__ +#include <device/device.h> +#include <device/pci.h> #endif #include "me.h" diff --git a/src/southbridge/intel/bd82x6x/me_8.x.c b/src/southbridge/intel/bd82x6x/me_8.x.c index 1a59dc4024d9..dc78e7184f42 100644 --- a/src/southbridge/intel/bd82x6x/me_8.x.c +++ b/src/southbridge/intel/bd82x6x/me_8.x.c @@ -32,11 +32,9 @@ #include <elog.h> #include <halt.h> -#ifdef __SMM__ -#include <arch/io.h> -#else -# include <device/device.h> -# include <device/pci.h> +#ifndef __SMM__ +#include <device/device.h> +#include <device/pci.h> #endif #include "me.h" diff --git a/src/southbridge/intel/bd82x6x/smihandler.c b/src/southbridge/intel/bd82x6x/smihandler.c index a108840b32e9..03d26876df5a 100644 --- a/src/southbridge/intel/bd82x6x/smihandler.c +++ b/src/southbridge/intel/bd82x6x/smihandler.c @@ -28,7 +28,6 @@ #include "nvs.h" #include <northbridge/intel/sandybridge/sandybridge.h> -#include <arch/io.h> #include <southbridge/intel/bd82x6x/me.h> #include <southbridge/intel/common/gpio.h> #include <cpu/intel/model_206ax/model_206ax.h> diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c index 31cdb3391da6..71655bc0fda6 100644 --- a/src/southbridge/intel/common/spi.c +++ b/src/southbridge/intel/common/spi.c @@ -37,7 +37,6 @@ #ifdef __SMM__ -#include <arch/io.h> #define pci_read_config_byte(dev, reg, targ)\ *(targ) = pci_read_config8(dev, reg) #define pci_read_config_word(dev, reg, targ)\ @@ -52,7 +51,6 @@ pci_write_config32(dev, reg, val) #else /* !__SMM__ */ #include <device/device.h> -#include <device/pci.h> #define pci_read_config_byte(dev, reg, targ)\ *(targ) = pci_read_config8(dev, reg) #define pci_read_config_word(dev, reg, targ)\ diff --git a/src/southbridge/intel/fsp_rangeley/early_init.c b/src/southbridge/intel/fsp_rangeley/early_init.c index ba4ebe061ca9..1ef8cb2add67 100644 --- a/src/southbridge/intel/fsp_rangeley/early_init.c +++ b/src/southbridge/intel/fsp_rangeley/early_init.c @@ -22,7 +22,6 @@ #include <device/pci_def.h> #include <pc80/mc146818rtc.h> #include <version.h> -#include <device/pci_def.h> #include "pci_devs.h" #include "soc.h" diff --git a/src/southbridge/intel/fsp_rangeley/lpc.c b/src/southbridge/intel/fsp_rangeley/lpc.c index 726fd3b9efe9..3e7c17a74ecd 100644 --- a/src/southbridge/intel/fsp_rangeley/lpc.c +++ b/src/southbridge/intel/fsp_rangeley/lpc.c @@ -29,7 +29,6 @@ #include <elog.h> #include <string.h> #include <cbmem.h> -#include <arch/acpi.h> #include <arch/acpigen.h> #include "soc.h" #include "irq.h" diff --git a/src/southbridge/intel/fsp_rangeley/soc.h b/src/southbridge/intel/fsp_rangeley/soc.h index 09172016e88b..ffadee4bf2f1 100644 --- a/src/southbridge/intel/fsp_rangeley/soc.h +++ b/src/southbridge/intel/fsp_rangeley/soc.h @@ -62,7 +62,6 @@ int soc_silicon_type(void); int soc_silicon_supported(int type, int rev); void soc_enable(struct device *dev); -#include <arch/acpi.h> void acpi_fill_in_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt); #if IS_ENABLED(CONFIG_ELOG) diff --git a/src/southbridge/intel/fsp_rangeley/spi.c b/src/southbridge/intel/fsp_rangeley/spi.c index 98ae708070c3..97548069ad2b 100644 --- a/src/southbridge/intel/fsp_rangeley/spi.c +++ b/src/southbridge/intel/fsp_rangeley/spi.c @@ -29,7 +29,6 @@ static int ich_status_poll(u16 bitmask, int wait_til_set); #ifdef __SMM__ -#include <arch/io.h> #define pci_read_config_byte(dev, reg, targ)\ *(targ) = pci_read_config8(dev, reg) #define pci_read_config_word(dev, reg, targ)\ diff --git a/src/southbridge/intel/ibexpeak/me.c b/src/southbridge/intel/ibexpeak/me.c index 0d75350572b0..b1ff815edbb7 100644 --- a/src/southbridge/intel/ibexpeak/me.c +++ b/src/southbridge/intel/ibexpeak/me.c @@ -31,11 +31,9 @@ #include <delay.h> #include <elog.h> -#ifdef __SMM__ -#include <arch/io.h> -#else -# include <device/device.h> -# include <device/pci.h> +#ifndef __SMM__ +#include <device/device.h> +#include <device/pci.h> #endif #include "me.h" diff --git a/src/southbridge/intel/ibexpeak/smihandler.c b/src/southbridge/intel/ibexpeak/smihandler.c index 4da76cf55879..b70273c76cd4 100644 --- a/src/southbridge/intel/ibexpeak/smihandler.c +++ b/src/southbridge/intel/ibexpeak/smihandler.c @@ -34,7 +34,6 @@ */ #include <northbridge/intel/nehalem/nehalem.h> #include <southbridge/intel/common/gpio.h> -#include <arch/io.h> /* While we read PMBASE dynamically in case it changed, let's * initialize it with a sane value diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index 3b8644a96d2b..8a5f3aca4445 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -33,7 +33,6 @@ #include "nvs.h" #include "pch.h" #include <arch/acpigen.h> -#include <cbmem.h> #include <drivers/intel/gma/i915.h> #include <southbridge/intel/common/acpi_pirq_gen.h> #include <southbridge/intel/common/rtc.h> diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h index 5850ab564e3e..a02be811f69a 100644 --- a/src/southbridge/intel/lynxpoint/pch.h +++ b/src/southbridge/intel/lynxpoint/pch.h @@ -174,7 +174,6 @@ void disable_gpe(u32 mask); #if !defined(__PRE_RAM__) && !defined(__SMM__) #include <device/device.h> -#include <arch/acpi.h> #include "chip.h" void pch_enable(struct device *dev); void pch_disable_devfn(struct device *dev); diff --git a/src/southbridge/nvidia/mcp55/lpc.c b/src/southbridge/nvidia/mcp55/lpc.c index b6bb1f8d3a0d..3ac646491022 100644 --- a/src/southbridge/nvidia/mcp55/lpc.c +++ b/src/southbridge/nvidia/mcp55/lpc.c @@ -33,7 +33,6 @@ #include <arch/acpi.h> #include <stdlib.h> #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) -#include <arch/acpi.h> #include <arch/acpigen.h> #endif #include <cpu/amd/powernow.h> |