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| author | Nico Huber <nico.huber@secunet.com> | 2015-10-30 11:29:14 +0100 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2015-11-16 17:57:43 +0100 |
| commit | ca374d34ed9246baf4fef97214bedd4c16c105a5 (patch) | |
| tree | 200f9906476ff54468050dacf1fc2a13d8b4e7bc | |
| parent | 439a527014fa0cb3e4ef60ba59e5c57c737b4444 (diff) | |
| download | coreboot-ca374d34ed9246baf4fef97214bedd4c16c105a5.tar.gz coreboot-ca374d34ed9246baf4fef97214bedd4c16c105a5.tar.bz2 coreboot-ca374d34ed9246baf4fef97214bedd4c16c105a5.zip | |
sandybridge: Disable parallel CPU initialization
Disable the parallel CPU initialization for model_206ax, that is Sandy
Bridge and Ivy Bridge processors. We never did it the way that Intel
recommends and it became unreliable with the introduction of SMM_MODULES
in commit a3e41c0 Migrate 206ax to SMM_MODULES.
Tested by booting kontron/ktqm77 2.6k times into Linux user space. No
issues so far.
Change-Id: Idffc352341419f22a36bf772534a5e11e711edf1
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/12329
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
| -rw-r--r-- | src/cpu/intel/model_206ax/Kconfig | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig index 490849bee759..8f062e53fadf 100644 --- a/src/cpu/intel/model_206ax/Kconfig +++ b/src/cpu/intel/model_206ax/Kconfig @@ -17,7 +17,6 @@ config CPU_SPECIFIC_OPTIONS select UDELAY_LAPIC select SMM_TSEG select SUPPORT_CPU_UCODE_IN_CBFS - select PARALLEL_CPU_INIT #select AP_IN_SIPI_WAIT select TSC_SYNC_MFENCE select LAPIC_MONOTONIC_TIMER |