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| author | Stefan Reinauer <reinauer@chromium.org> | 2015-08-04 11:14:17 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-08-04 21:25:08 +0200 |
| commit | fb82ebe9065e2160e662aee490d749ac31388fa6 (patch) | |
| tree | a164e2a2fe6b33bc729e8c1325b514821b7ffde5 | |
| parent | 5d5fcdd82b72c1fc621aab9fd6ff88cce9345d8e (diff) | |
| download | coreboot-fb82ebe9065e2160e662aee490d749ac31388fa6.tar.gz coreboot-fb82ebe9065e2160e662aee490d749ac31388fa6.tar.bz2 coreboot-fb82ebe9065e2160e662aee490d749ac31388fa6.zip | |
x86: Make sure boot device is mapped below 4G
On x86-64 the current way of calculating the base address
of the boot device (SPI flash) gets an unwanted sign extension,
making it live somewhere at the end of 64bit address space.
Enforce rom_base to be at the upper end of the 4G address space.
Change-Id: Ia81e82094d3c51f6c10e02b4b0df2f3e1519d39e
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/11121
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
| -rw-r--r-- | src/arch/x86/mmap_boot.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/x86/mmap_boot.c b/src/arch/x86/mmap_boot.c index 6c98954ff295..53973f9bb459 100644 --- a/src/arch/x86/mmap_boot.c +++ b/src/arch/x86/mmap_boot.c @@ -24,7 +24,7 @@ #include <stdlib.h> /* The ROM is memory mapped just below 4GiB. Form a pointer for the base. */ -#define rom_base ((void *)(uintptr_t)(-(int32_t)CONFIG_ROM_SIZE)) +#define rom_base ((void *)(uintptr_t)(0x100000000ULL-CONFIG_ROM_SIZE)) static const struct mem_region_device boot_dev = MEM_REGION_DEV_INIT(rom_base, CONFIG_ROM_SIZE); |