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| author | Felix Held <felix-coreboot@felixheld.de> | 2023-03-02 21:01:37 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-05-13 00:14:11 +0000 |
| commit | 0a2c9d7913978dfc82f14e26dded7fa1b89f47d1 (patch) | |
| tree | c8cbff506c336c266f245719ee5d1418cda85772 | |
| parent | 7fd71e6fc40ea69edd42f0dd796bd7c7272dec06 (diff) | |
| download | coreboot-0a2c9d7913978dfc82f14e26dded7fa1b89f47d1.tar.gz coreboot-0a2c9d7913978dfc82f14e26dded7fa1b89f47d1.tar.bz2 coreboot-0a2c9d7913978dfc82f14e26dded7fa1b89f47d1.zip | |
nb/amd/pi/00730F01: request binaryPI to use \_SB_ scope in PSTATE SSDT
Instead of having binaryPI generate a PSTATE SSDT that uses \_PR_ as the
scope for the CPU objects and patching this SSDT in coreboot to use the
\_SB_ scope in patch_ssdt_processor_scope, request binaryPI to use the
\_SB_ scope instead by setting the late platform configuration option
ProcessorScopeInSb to true.
TEST=APU2 still boots and Linux doesn't show any ACPI errors with this
patch applied and it prints "ACPI: \_SB_.P000: Found 2 idle states".
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I411201b55cfee30ae41da4e6814679bdb49e9bf7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73386
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
| -rw-r--r-- | src/northbridge/amd/pi/00730F01/northbridge.c | 16 | ||||
| -rw-r--r-- | src/northbridge/amd/pi/00730F01/state_machine.c | 3 |
2 files changed, 3 insertions, 16 deletions
diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c index b9ac022697d1..46610c51e2a7 100644 --- a/src/northbridge/amd/pi/00730F01/northbridge.c +++ b/src/northbridge/amd/pi/00730F01/northbridge.c @@ -554,21 +554,6 @@ static void northbridge_fill_ssdt_generator(const struct device *device) acpigen_pop_len(); } -static void patch_ssdt_processor_scope(acpi_header_t *ssdt) -{ - unsigned int len = ssdt->length - sizeof(acpi_header_t); - unsigned int i; - - for (i = sizeof(acpi_header_t); i < len; i++) { - /* Search for _PR_ scope and replace it with _SB_ */ - if (*(uint32_t *)((unsigned long)ssdt + i) == 0x5f52505f) - *(uint32_t *)((unsigned long)ssdt + i) = 0x5f42535f; - } - /* Recalculate checksum */ - ssdt->checksum = 0; - ssdt->checksum = acpi_checksum((void *)ssdt, ssdt->length); -} - static unsigned long agesa_write_acpi_tables(const struct device *device, unsigned long current, acpi_rsdp_t *rsdp) @@ -639,7 +624,6 @@ static unsigned long agesa_write_acpi_tables(const struct device *device, printk(BIOS_DEBUG, "ACPI: * SSDT at %lx\n", current); ssdt = (acpi_header_t *)agesawrapper_getlateinitptr(PICK_PSTATE); if (ssdt != NULL) { - patch_ssdt_processor_scope(ssdt); memcpy((void *)current, ssdt, ssdt->length); ssdt = (acpi_header_t *)current; current += ssdt->length; diff --git a/src/northbridge/amd/pi/00730F01/state_machine.c b/src/northbridge/amd/pi/00730F01/state_machine.c index 9128c2427e50..a05e9e04e814 100644 --- a/src/northbridge/amd/pi/00730F01/state_machine.c +++ b/src/northbridge/amd/pi/00730F01/state_machine.c @@ -69,6 +69,9 @@ void platform_BeforeInitLate(struct sysinfo *cb, AMD_LATE_PARAMS *Late) Late->GnbLateConfiguration.FchIoapicId = FCH_IOAPIC_ID; } + /* Make binaryPI use \_SB_ as processor object scope in PSTATE SSDT */ + Late->PlatformConfig.ProcessorScopeInSb = true; + /* Code for creating CDIT requires hop count table. If it is not * present AGESA_ERROR is returned, which confuses users. CDIT is not * written to the ACPI tables anyway. */ |