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| author | Eric Lai <eric_lai@quanta.corp-partner.google.com> | 2023-05-13 15:43:07 +0800 |
|---|---|---|
| committer | Eric Lai <eric_lai@quanta.corp-partner.google.com> | 2023-05-14 03:26:06 +0000 |
| commit | 909829e3044f3d7c6365fdc1562f9c7468638504 (patch) | |
| tree | f49355b9ec74ac9882d095b5343f1b21ef865bba | |
| parent | 3707400f805652b3ab09262eedb2fe3759e7f1e8 (diff) | |
| download | coreboot-909829e3044f3d7c6365fdc1562f9c7468638504.tar.gz coreboot-909829e3044f3d7c6365fdc1562f9c7468638504.tar.bz2 coreboot-909829e3044f3d7c6365fdc1562f9c7468638504.zip | |
mb/google/hades: update TPM IRQ in early gpio table
TPM IRQ should be A20 not A13. RAM table is correct.
BUG=b:282164589
TEST=able to boot up
Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Change-Id: I82a709cc280288d612c65697b8da3c4274d4cd3b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75191
Reviewed-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com>
Reviewed-by: Ian Feng <ian_feng@compal.corp-partner.google.com>
Reviewed-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Reviewed-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Reviewed-by: Tarun Tuli <taruntuli@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/mainboard/google/brya/variants/hades/gpio.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/variants/hades/gpio.c b/src/mainboard/google/brya/variants/hades/gpio.c index e0588c345f83..d0a7cc2162d8 100644 --- a/src/mainboard/google/brya/variants/hades/gpio.c +++ b/src/mainboard/google/brya/variants/hades/gpio.c @@ -383,7 +383,7 @@ static const struct pad_config early_gpio_table[] = { /* GPP_A12 : [] ==> EN_PPVAR_WWAN */ PAD_CFG_GPO(GPP_A12, 1, DEEP), /* GPP_A13 : [] ==> GSC_PCH_INT_ODL */ - PAD_CFG_GPI_APIC(GPP_A13, NONE, PLTRST, LEVEL, INVERT), + PAD_CFG_GPI_APIC(GPP_A20, NONE, PLTRST, LEVEL, INVERT), /* GPP_B4 : [] ==> SSD_PERST_L */ PAD_CFG_GPO(GPP_B4, 0, DEEP), /* GPP_B7 : [] ==> PCH_I2C_TPM_SDA */ |