mb/google/brox: Set unstuffed straps to NC

All of these signals have net names, but are actually unstuffed, so we
have to set them to NC.

BUG=b:300690448
BRANCH=None
TEST=emerge-brox coreboot

Change-Id: I27d8b7cd02aefb49a2dc031a30eb0d1e8aa9faa9
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78951
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>

1 files changed, 15 insertions, 15 deletions

diff --git a/src/mainboard/google/brox/variants/baseboard/brox/gpio.c b/src/mainboard/google/brox/variants/baseboard/brox/gpio.c
index 886fdf2398b4..daf1b96a00d5 100644
--- a/src/mainboard/google/brox/variants/baseboard/brox/gpio.c
+++ b/src/mainboard/google/brox/variants/baseboard/brox/gpio.c
@@ -19,8 +19,8 @@ static const struct pad_config gpio_table[] = {
 	PAD_CFG_NF(GPD0, NONE, DEEP, NF1),
 	/* GPD1 : [NF1: ACPRESENT] ==> ACPRESENT */
 	PAD_CFG_NF(GPD1, NONE, DEEP, NF1),
-	/* GPD2 : [NF1: LAN_WAKE#] ==> PCH_WAKE_ODL */
-	PAD_CFG_NF(GPD2, NONE, DEEP, NF1),
+	/* GPD2 : [NF1: LAN_WAKE#] ==> SOC_GPD2 */
+	PAD_NC(GPD2, NONE),
 	/* GPD3 : [NF1: PWRBTN#] ==> EC_PCH_PWR_BTN_ODL */
 	PAD_CFG_NF(GPD3, NONE, DEEP, NF1),
 	/* GPD4 : [NF1: SLP_S3#] ==> SLP_S3_R_L */
@@ -29,8 +29,8 @@ static const struct pad_config gpio_table[] = {
 	PAD_CFG_NF(GPD5, NONE, DEEP, NF1),
 	/* GPD6 : [NF1: SLP_A#] ==> SLP_A_L_CAP_SITE */
 	PAD_CFG_NF(GPD6, NONE, DEEP, NF1),
-	/* GPD7 : GPD7_STRAP ==> Component NC */
-	PAD_NC(GPD7, NONE),
+	/* GPD7 : GPD7_STRAP ==> SOC_GPD7_STRAP */
+	PAD_NC(GPD7, DN_20K),
 	/* GPD8 : [NF1: SUSCLK] ==> PCH_SUSCLK */
 	PAD_CFG_NF(GPD8, NONE, DEEP, NF1),
 	/* GPD9 : [NF1: SLP_WLAN#] ==> SLP_WLAN_L_CAP_SITE */
@@ -96,9 +96,9 @@ static const struct pad_config gpio_table[] = {
 	/* GPP_B6 : [NF1: ISH_I2C0_SCL NF2: I2C2_SCL NF6: USB_C_GPP_B6] ==> ISH_I2C_SENSOR_SCL */
 	PAD_CFG_NF(GPP_B6, NONE, DEEP, NF2),
 	/* GPP_B7 : [NF1: ISH_I2C1_SDA NF2: I2C3_SDA NF6: USB_C_GPP_B7] ==> SOC_I2C3_SDA */
-	PAD_CFG_NF(GPP_B7, NONE, DEEP, NF2),
+	PAD_NC(GPP_B7, NONE),
 	/* GPP_B8 : [NF1: ISH_I2C1_SCL NF2: I2C3_SCL NF6: USB_C_GPP_B8] ==> SOC_I2C3_SCL */
-	PAD_CFG_NF(GPP_B8, NONE, DEEP, NF2),
+	PAD_NC(GPP_B8, NONE),
 	/* GPP_B11 : [NF1: PMCALERT# NF6: USB_C_GPP_B11] ==> SOC_I2C_PD_INT_ODL */
 	PAD_CFG_GPI_APIC_LOCK(GPP_B11, NONE, LEVEL, INVERT, LOCK_CONFIG),
 	/* GPP_B12 : [NF1: SLP_S0# NF6: USB_C_GPP_B12] ==> SLP_S0_R_L */
@@ -113,8 +113,8 @@ static const struct pad_config gpio_table[] = {
 	PAD_CFG_NF(GPP_B16, NONE, DEEP, NF2),
 	/* GPP_B17 : [NF2: I2C5_SCL NF4: ISH_I2C2_SCL NF6: USB_C_GPP_B17] ==> ISH_I2C_EC_SCL */
 	PAD_CFG_NF(GPP_B17, NONE, DEEP, NF2),
-	/* GPP_B18 : GPP_B18_STRAP ==> Component NC */
-	PAD_CFG_GPI(GPP_B18, DN_20K, DEEP),
+	/* GPP_B18 : GPP_B18 ==> GPP_B18_STRAP */
+	PAD_NC(GPP_B18, DN_20K),
 	/* GPP_B23 : SML1ALERT_L/PCHHOT_L ==> PCHHOT_ODL_STRAP */
 	PAD_CFG_GPI(GPP_B23, DN_20K, DEEP),
 
@@ -123,7 +123,7 @@ static const struct pad_config gpio_table[] = {
 	/* GPP_C1 : [NF1: SMBDATA NF6: USB_C_GPP_C1] ==> SOC_GPP_C1 */
 	PAD_NC(GPP_C1, NONE),
 	/* GPP_C2 : SMBALAERT_L ==> SOC_GPP_C2_STRAP */
-	PAD_CFG_GPI(GPP_C2, DN_20K, DEEP),
+	PAD_NC(GPP_C2, DN_20K),
 	/* GPP_C3 : [NF1: SML0CLK NF6: USB_C_GPP_C3] ==> SMB_SML0_CLK */
 	PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1),
 	/* GPP_C4 : [NF1: SML0DATA NF6: USB_C_GPP_C4] ==> SMB_SML0_DAT */
@@ -160,7 +160,7 @@ static const struct pad_config gpio_table[] = {
 	/* GPP_D11 : [] ==> EN_PP3300_SSD */
 	PAD_CFG_GPO(GPP_D11, 0, DEEP),
 	/* GPP_D12 : [NF1: ISH_SPI_MOSI NF2: DDP4_CTRLDATA NF4: TBT_LSX3_RXD NF5: BSSB_LS3_TX NF6: USB_C_GPP_D12 NF7: GSPI2_MOSI] ==> SOC_GPP_D12 */
-	PAD_CFG_NF(GPP_D12, NONE, DEEP, NF6),
+	PAD_NC(GPP_D12, DN_20K),
 	/* GPP_D13 : [NF1: ISH_UART0_RXD NF3: I2C6_SDA NF6: USB_C_GPP_D13] ==> UART0_ISH_RX_DBG_TX */
 	PAD_CFG_NF(GPP_D13, NONE, DEEP, NF1),
 	/* GPP_D14 : [NF1: ISH_UART0_TXD NF3: I2C6_SCL NF6: USB_C_GPP_D14] ==> UART0_ISH_TX_DBG_RX */
@@ -219,9 +219,9 @@ static const struct pad_config gpio_table[] = {
 	/* GPP_E20 : [NF1: DDP2_CTRLCLK NF4: TBT_LSX1_TXD NF5: BSSB_LS1_RX NF6: USB_C_GPP_E20] ==> SOC_GPP_E20 */
 	PAD_NC(GPP_E20, NONE),
 	/* GPP_E21 : DDP2_CTRLDATA/TBT_LSX1_RXD/BSSB_LS1_TX ==> USB_C1_LSX_RX_STRAP */
-	PAD_CFG_GPI(GPP_E21, NONE, DEEP),
+	PAD_NC(GPP_E21, DN_20K),
 	/* GPP_E22 : DDPA_CTRLCLK/DNX_FORCE_RELOAD ==> USB_C0_AUX_DC_STRAP_P */
-	PAD_CFG_GPO(GPP_E22, 0, DEEP),
+	PAD_NC(GPP_E22, DN_20K),
 	/* GPP_E23 : [NF1: DDPA_CTRLDATA] ==> USB_C0_AUX_DC_N */
 	PAD_CFG_NF(GPP_E23, NONE, DEEP, NF6),
 
@@ -244,7 +244,7 @@ static const struct pad_config gpio_table[] = {
 	/* GPP_F9 : [NF1: BOOTMPC NF6: USB_C_GPP_F9] ==> SSD_PERST_L */
 	PAD_CFG_GPO(GPP_F9, 1, PLTRST),
 	/* GPP_F10 : GPP_F10 ==> GPP_F10_STRAP */
-	PAD_CFG_GPI(GPP_F10, DN_20K, DEEP),
+	PAD_NC(GPP_F10, DN_20K),
 	/* GPP_F11 : [NF3: THC1_SPI2_CLK NF4: GSPI1_CLK NF6: USB_C_GPP_F11] ==> SOC_GPP_F11 */
 	PAD_NC(GPP_F11, NONE),
 	/* GPP_F12 : [NF1: GSXDOUT NF3: THC1_SPI2_IO0 NF4: GSPI1_MOSI NF5: I2C1A_SCL NF6: USB_C_GPP_F12] ==> SOC_GPP_F12 */
@@ -273,9 +273,9 @@ static const struct pad_config gpio_table[] = {
 	PAD_NC(GPP_F23, NONE),
 
 	/* GPP_H0 : [NF6: USB_C_GPP_H0] ==> GPP_H0_BOOT_STRAP1 */
-	PAD_CFG_GPI(GPP_H0, NONE, DEEP),
+	PAD_NC(GPP_H0, DN_20K),
 	/* GPP_H1 : [NF6: USB_C_GPP_H1] ==> GPP_H1_BOOT_STRAP2 */
-	PAD_CFG_GPI(GPP_H1, NONE, DEEP),
+	PAD_NC(GPP_H1, DN_20K),
 	/* GPP_H2 : [NF6: USB_C_GPP_H2] ==> WLAN_PERST_L */
 	PAD_CFG_GPO(GPP_H2, 1, DEEP),
 	/* GPP_H3 : [NF1: SX_EXIT_HOLDOFF# NF6: USB_C_GPP_H3] ==> WLAN_PCIE_WAKE_ODL */