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authorPaul Menzel <paulepanter@users.sourceforge.net>2013-03-01 13:05:04 +0100
committerKyösti Mälkki <kyosti.malkki@gmail.com>2018-01-14 10:31:32 +0000
commite4a016ff17b455a8acd0ea72b30caabb622ce224 (patch)
treef12baae686b4caaca760006059724683d0f0ce9b
parent3dce9f09d9e26b147153ad0cda493ecb4b6d15d8 (diff)
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AMD CIMx SB800: late.c: Use variable `device` from for loop condition
Use the variable `device` instead of `dev` in the predicate of the if condition, as `dev` is not changed in the for loop. The for loop was added in the following commit. commit 8fed77ae4c46122859d0718678e54546e126d4bc Author: Scott Duplichan <scott@notabs.org> Date: Sat Jun 18 10:46:45 2011 -0500 ASRock E350M1: Configure SB800 GPP ports to support onboard pcie nic Reviewed-on: http://review.coreboot.org/44 The assumption that the devices are ordered in the tree seem to hold in this case (although it is not ensured) and therefore at least with the ASRock E350M1 no (visible) change is experienced as the children are all of type `DEVICE_PATH_PCI`. Change-Id: Iaa2fa13305dbe924965d27680cd02fe30c2f58a5 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/2562 Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/southbridge/amd/cimx/sb800/late.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c
index ed4f8a5ab31f..c4cbd20f5415 100644
--- a/src/southbridge/amd/cimx/sb800/late.c
+++ b/src/southbridge/amd/cimx/sb800/late.c
@@ -428,9 +428,8 @@ static void sb800_enable(device_t dev)
case (0x15 << 3) | 0: /* 0:15:0 PCIe PortA */
{
device_t device;
- for (device = dev; device; device = device->next) {
- if (dev->path.type != DEVICE_PATH_PCI) continue;
- if ((device->path.pci.devfn & ~7) != PCI_DEVFN(0x15,0)) break;
+ for (device = dev; device; device = device->sibling) {
+ if ((device->path.pci.devfn & ~3) != PCI_DEVFN(0x15,0)) break;
sb_config->PORTCONFIG[device->path.pci.devfn & 3].PortCfg.PortPresent = device->enabled;
}