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authorPattrick Hueper <phueper@hueper.net>2009-03-05 21:28:56 +0000
committerPattrick Hueper <phueper@hueper.net>2009-03-05 21:28:56 +0000
commit1ef9d2f412e6e18bec9a268d9bacf8d4d6374158 (patch)
treef2b613cbe616d429dbc2c08cfec6c8a30b885669
parent77407f534130afedc65315f89a6f48e2d1375205 (diff)
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YABEL: fix 32bit cf8/cfc PCI Config accesses
Signed-off-by: Pattrick Hueper <phueper@hueper.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1144 f3766cd6-281f-0410-b1cd-43a5c92072e9
-rw-r--r--util/x86emu/yabel/io.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/util/x86emu/yabel/io.c b/util/x86emu/yabel/io.c
index a69e5e66cddd..6f481a7d849c 100644
--- a/util/x86emu/yabel/io.c
+++ b/util/x86emu/yabel/io.c
@@ -348,7 +348,7 @@ u32
pci_cfg_read(X86EMU_pioAddr addr, u8 size)
{
u32 rval = 0xFFFFFFFF;
- if ((addr >= 0xCFC) && ((addr + size) <= 0xCFF)) {
+ if ((addr >= 0xCFC) && ((addr + size) <= 0xD00)) {
// PCI Configuration Mechanism 1 step 1
// write to 0xCF8, sets bus, device, function and Config Space offset
// later read from 0xCFC-0xCFF returns the value...
@@ -404,7 +404,7 @@ pci_cfg_read(X86EMU_pioAddr addr, u8 size)
void
pci_cfg_write(X86EMU_pioAddr addr, u32 val, u8 size)
{
- if ((addr >= 0xCFC) && ((addr + size) <= 0xCFF)) {
+ if ((addr >= 0xCFC) && ((addr + size) <= 0xD00)) {
// PCI Configuration Mechanism 1 step 1
// write to 0xCF8, sets bus, device, function and Config Space offset
// later write to 0xCFC-0xCFF sets the value...