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| author | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2009-03-20 16:05:56 +0000 |
|---|---|---|
| committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2009-03-20 16:05:56 +0000 |
| commit | 2c580fab85f6060f63d6b73cc3ddc950aa6899d1 (patch) | |
| tree | d941f0d64dc3c38066f0ff7efe0e259984f74612 | |
| parent | c1ebcbb8eb5caed516e29a88f72c21393f330ffb (diff) | |
| download | coreboot-2c580fab85f6060f63d6b73cc3ddc950aa6899d1.tar.gz coreboot-2c580fab85f6060f63d6b73cc3ddc950aa6899d1.tar.bz2 coreboot-2c580fab85f6060f63d6b73cc3ddc950aa6899d1.zip | |
Emergency fixup for the missing is_coldboot().
Note that the weak is_coldboot() returns always 1.
The i945 is_coldboot() returns 1 for a warm boot?
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@1161 f3766cd6-281f-0410-b1cd-43a5c92072e9
| -rw-r--r-- | lib/stage2.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/lib/stage2.c b/lib/stage2.c index 899fb734e654..ea16862d4352 100644 --- a/lib/stage2.c +++ b/lib/stage2.c @@ -31,6 +31,17 @@ #include <lib.h> /** + * Note that this function has exactly the opposite return code of + * northbridge/intel/i945/reset_test.c which returns 0 on cold boot. + * + * @returns always 1 + */ +int __attribute__((weak)) is_coldboot(void) +{ + return 1; +} + +/** * CPU init code which runs BEFORE any stage2 dev_phase1 is run. * This code might, for example, init ECC on all cores. * |