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| author | Ronald G. Minnich <rminnich@gmail.com> | 2009-02-21 17:28:24 +0000 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2009-02-21 17:28:24 +0000 |
| commit | 509ab45a81573a66d251ca4f0c052e3cb02d598d (patch) | |
| tree | 0df868754923a377b9827ae9cdc137b0382ccb34 | |
| parent | 5f27d204bc48b2308a038efa3915c723feb02b47 (diff) | |
| download | coreboot-509ab45a81573a66d251ca4f0c052e3cb02d598d.tar.gz coreboot-509ab45a81573a66d251ca4f0c052e3cb02d598d.tar.bz2 coreboot-509ab45a81573a66d251ca4f0c052e3cb02d598d.zip | |
This is a trivial commit and I want to get other people to look at the code.
I can still get to linux but core1 is not working.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@1137 f3766cd6-281f-0410-b1cd-43a5c92072e9
| -rw-r--r-- | arch/x86/intel/core2/init_cpus.c | 17 | ||||
| -rw-r--r-- | arch/x86/secondary.S | 7 |
2 files changed, 13 insertions, 11 deletions
diff --git a/arch/x86/intel/core2/init_cpus.c b/arch/x86/intel/core2/init_cpus.c index 7577ad8d86c2..b5e0548cde60 100644 --- a/arch/x86/intel/core2/init_cpus.c +++ b/arch/x86/intel/core2/init_cpus.c @@ -77,7 +77,8 @@ unsigned int get_nodes(void) if (siblings < 1) { siblings = 1; } - nodes = siblings + 1; + /* it seems this is the number of nodes */ + nodes = siblings; printk(BIOS_DEBUG, "%s: %d\n", __func__, nodes); return nodes; } @@ -260,9 +261,7 @@ static int lapic_start_cpu(unsigned long apicid, u32 *secondary_base) return 0; } - /* the first 32 bits of secondary_base is the stack pointer */ - /* N.B.: + 1 because secondary_base is a u32 *! */ - start_eip = (u32) (secondary_base + 1); + start_eip = (u32) secondary_base; num_starts = 2; /* @@ -288,6 +287,7 @@ static int lapic_start_cpu(unsigned long apicid, u32 *secondary_base) /* Boot on the stack */ /* Kick the second */ + printk(BIOS_SPEW, "Send start_eip %#lx(%#lx)\n", start_eip, start_eip>>12); lapic_write_around(LAPIC_ICR, LAPIC_DM_STARTUP | (start_eip >> 12)); @@ -341,7 +341,7 @@ struct stack { struct atomic *active_cpus; struct spinlock *start_cpu_lock; u32 callerpc; - u32 data[16384/sizeof(u32) - 4]; + u32 data[16384/sizeof(u32) - 7]; }; struct stackmem { @@ -352,7 +352,7 @@ struct stackmem { int start_cpu(u32 apicid, struct atomic *active_cpus, struct spinlock *start_cpu_lock, int *last_cpu_index, u32 *secondary_base) { - unsigned long stack_end; + u32 stack_end; unsigned long index; unsigned long count; int result; @@ -370,7 +370,7 @@ int start_cpu(u32 apicid, struct atomic *active_cpus, struct spinlock *start_cpu * can see them. */ stack_end = (u32)&stackmem->stacks[index].data; - printk(BIOS_SPEW, "Stack for AP %ld is %lx\n", index, stack_end); + printk(BIOS_SPEW, "Stack for AP %ld is %x\n", index, stack_end); stackmem->stacks[index].index= index; stackmem->stacks[index].apicid = apicid; @@ -378,7 +378,8 @@ int start_cpu(u32 apicid, struct atomic *active_cpus, struct spinlock *start_cpu stackmem->stacks[index].active_cpus = active_cpus; stackmem->stacks[index].start_cpu_lock = start_cpu_lock; /* Advertise the new stack to start_cpu */ - *secondary_base = stack_end; + printk(BIOS_SPEW, "Set stack @ %p to %p\n", &secondary_base[-1], (void *)stack_end); + secondary_base[-1] = stack_end; /* Start the cpu */ result = lapic_start_cpu(apicid, secondary_base); diff --git a/arch/x86/secondary.S b/arch/x86/secondary.S index 899f90a50d97..8c9ea898fbe1 100644 --- a/arch/x86/secondary.S +++ b/arch/x86/secondary.S @@ -23,10 +23,9 @@ */ .text .globl _secondary_start, _secondary_start_end - .balign 4096 _secondary_start: .code16 - .long 0 + .balign 4096 cli xorl %eax, %eax movl %eax, %cr3 /* Invalidate TLB*/ @@ -49,6 +48,7 @@ _secondary_start: ljmpl $0x10, $1f 1: .code32 +secondary32: movw $0x18, %ax movw %ax, %ds movw %ax, %es @@ -60,7 +60,8 @@ _secondary_start: lidt idtarg /* Set the stack pointer */ - movl _secondary_start, %esp + movl $_secondary_start-4,%eax + movl 0x0(%eax),%esp call secondary_cpu_init 1: hlt |