cs5536: Remove redundant enable_ide variable from ide device.

The device infrastructure already has an enabled bit, so we don't need to duplicate it in the current form.
cs5536.c:ide_init() is phase6_init, which is called only if the device is enabled, so if the device doesn't
exist, or the mainboard dts says "disabled;" for it, the init is not done and an extra conditional is not
necessary.
Adapt all cs5536 using mainboards to it (removing enable_ide variable) - artecgroup/dbe6[12] gets the whole
IDE device removed, which results in the ide_init() code not being ran as before (before it was called but
early return from enable_ide == 0, now it won't be called in the first place).

Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>

git-svn-id: svn://coreboot.org/repository/coreboot-v3@1114 f3766cd6-281f-0410-b1cd-43a5c92072e9

10 files changed, 1 insertions, 21 deletions

diff --git a/mainboard/adl/msm800sev/dts b/mainboard/adl/msm800sev/dts
index 46a216927d33..12e27a53555d 100644
--- a/mainboard/adl/msm800sev/dts
+++ b/mainboard/adl/msm800sev/dts
@@ -39,7 +39,6 @@
 		};
 		pci@f,2 {
 			/config/("southbridge/amd/cs5536/ide");
-			enable_ide = "1";
 		};
 		ioport@2e {
 			/config/("superio/winbond/w83627hf/dts");
diff --git a/mainboard/amd/db800/dts b/mainboard/amd/db800/dts
index dd444875ee98..75da7de32380 100644
--- a/mainboard/amd/db800/dts
+++ b/mainboard/amd/db800/dts
@@ -54,7 +54,6 @@
 		};
 		pci@f,2 {
 			/config/("southbridge/amd/cs5536/ide");
-			enable_ide = "1";
 		};
 		ioport@2e {
 			/config/("superio/winbond/w83627hf/dts");
diff --git a/mainboard/amd/norwich/dts b/mainboard/amd/norwich/dts
index 6444e9ddd4a3..ea7f9c07b575 100644
--- a/mainboard/amd/norwich/dts
+++ b/mainboard/amd/norwich/dts
@@ -57,7 +57,6 @@
 		};
 		pci@f,2 {
 			/config/("southbridge/amd/cs5536/ide");
-			enable_ide = "1";
 		};
 	};
 };
diff --git a/mainboard/amp/tinygx/dts b/mainboard/amp/tinygx/dts
index 95f3722b08d8..75a93b071e6a 100644
--- a/mainboard/amp/tinygx/dts
+++ b/mainboard/amp/tinygx/dts
@@ -54,7 +54,6 @@
 		};
 		pci@f,2 {
 			/config/("southbridge/amd/cs5536/ide");
-			enable_ide = "1";
 		};
 		ioport@2e {
 			/config/("superio/ite/it8716f/dts");
diff --git a/mainboard/artecgroup/dbe61/dts b/mainboard/artecgroup/dbe61/dts
index 48df2881da89..a6995cee9374 100644
--- a/mainboard/artecgroup/dbe61/dts
+++ b/mainboard/artecgroup/dbe61/dts
@@ -112,8 +112,5 @@ end
 		pci@f,1 {
 			/config/("southbridge/amd/cs5536/nand");
 		};
-		pci@f,2 {
-			/config/("southbridge/amd/cs5536/ide");
-		};
 	};
 };
diff --git a/mainboard/artecgroup/dbe62/dts b/mainboard/artecgroup/dbe62/dts
index 3cbe0ff1a74d..8089e791f344 100644
--- a/mainboard/artecgroup/dbe62/dts
+++ b/mainboard/artecgroup/dbe62/dts
@@ -66,8 +66,5 @@
 		pci@f,1 {
 			/config/("southbridge/amd/cs5536/nand");
 		};
-		pci@f,2 {
-			/config/("southbridge/amd/cs5536/ide");
-		};
 	};
 };
diff --git a/mainboard/pcengines/alix1c/dts b/mainboard/pcengines/alix1c/dts
index 724a74f95a94..2f3d76724d79 100644
--- a/mainboard/pcengines/alix1c/dts
+++ b/mainboard/pcengines/alix1c/dts
@@ -51,7 +51,6 @@
 		};
 		pci@f,2 {
 			/config/("southbridge/amd/cs5536/ide");
-			enable_ide = "1";
 		};
 		ioport@2e {
 			/config/("superio/winbond/w83627hf/dts");
diff --git a/mainboard/pcengines/alix2c3/dts b/mainboard/pcengines/alix2c3/dts
index c1b4d31aeb91..30390b5114e5 100644
--- a/mainboard/pcengines/alix2c3/dts
+++ b/mainboard/pcengines/alix2c3/dts
@@ -51,7 +51,6 @@
 		};
 		pci@f,2 {
 			/config/("southbridge/amd/cs5536/ide");
-			enable_ide = "1";
 		};
 	};
 };
diff --git a/southbridge/amd/cs5536/cs5536.c b/southbridge/amd/cs5536/cs5536.c
index 057400f1f3a4..729cb7ee7ff0 100644
--- a/southbridge/amd/cs5536/cs5536.c
+++ b/southbridge/amd/cs5536/cs5536.c
@@ -609,7 +609,7 @@ void chipsetinit(void)
 
 /**
  * Enables the IDE. This is code that is run if there is an ide device in the mainboard
- * device tree and it has set non-zero "enable_ide".
+ * device tree.
  * 
  * @param dev The device 
  */
@@ -617,11 +617,6 @@ static void ide_init(struct device *dev)
 {
 	u32 ide_cfg;
 
-	struct southbridge_amd_cs5536_ide_config *ide =
-	    (struct southbridge_amd_cs5536_ide_config *)dev->device_configuration;
-	if (!ide->enable_ide)
-		return;
-
 	printk(BIOS_DEBUG, "cs5536_ide: %s\n", __func__);
 	/* GPIO and IRQ setup are handled in the main chipset code. */
 
diff --git a/southbridge/amd/cs5536/ide b/southbridge/amd/cs5536/ide
index 42c9d5f61da4..6cc8e2e14f24 100644
--- a/southbridge/amd/cs5536/ide
+++ b/southbridge/amd/cs5536/ide
@@ -20,7 +20,4 @@
 
 {
 	device_operations = "cs5536_ide";
-
-	/* IDE: enable CS5536 IDE. There may be a different IDE controller on board */
-	enable_ide = "0";
 };