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author | Krystian Hebel <krystian.hebel@3mdeb.com> | 2024-05-08 14:30:26 +0200 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2024-05-15 16:53:50 +0000 |
commit | a8fdafa427f3794c14464a97c3e4628dbb9a2050 (patch) | |
tree | d6c0bf236274f7bfd222a0936b1d45bc75335df1 | |
parent | 07913736e001db918161bbe179491163512dcfc3 (diff) | |
download | coreboot-a8fdafa427f3794c14464a97c3e4628dbb9a2050.tar.gz coreboot-a8fdafa427f3794c14464a97c3e4628dbb9a2050.tar.bz2 coreboot-a8fdafa427f3794c14464a97c3e4628dbb9a2050.zip |
cpu/x86/pae/pgtbl.c: remove dead paging_identity_map_addr()
This function had roughly the same use (except PAT) as part of
memset_pae(), however the latter is able to make use of PAE and map
physical memory located above 4 GB. Remove paging_identity_map_addr()
to avoid semi-duplicated code.
The function has been unused since CB:26745.
Change-Id: I7a4ebd84a6f5d222c3b2c6c6e3d26d6464cf01b8
Signed-off-by: Krystian Hebel <krystian.hebel@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82248
Reviewed-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r-- | src/cpu/x86/pae/pgtbl.c | 174 | ||||
-rw-r--r-- | src/include/cpu/x86/pae.h | 5 |
2 files changed, 0 insertions, 179 deletions
diff --git a/src/cpu/x86/pae/pgtbl.c b/src/cpu/x86/pae/pgtbl.c index 2bcb67c980c3..e1803aa40ea4 100644 --- a/src/cpu/x86/pae/pgtbl.c +++ b/src/cpu/x86/pae/pgtbl.c @@ -277,177 +277,3 @@ int paging_enable_for_car(const char *pdpt_name, const char *pt_name) return 0; } - -static void *get_pdpt_addr(void) -{ - if (preram_symbols_available()) - return _pdpt; - return (void *)(uintptr_t)read_cr3(); -} - -static uint64_t pde_pat_flags(int pat) -{ - switch (pat) { - case PAT_UC: - return 0 | PDE_PCD | PDE_PWT; - case PAT_WC: - return 0 | 0 | PDE_PWT; - case PAT_WT: - return PDE_PAT | PDE_PCD | PDE_PWT; - case PAT_WP: - return PDE_PAT | 0 | PDE_PWT; - case PAT_WB: - return 0 | 0 | 0; - case PAT_UC_MINUS: - return 0 | PDE_PCD | 0; - default: - printk(BIOS_ERR, "PDE PAT defaulting to WB: %x\n", pat); - return pde_pat_flags(PAT_WB); - } -} - -static uint64_t pde_page_flags(int pat) -{ - uint64_t flags = PDE_PS | PDE_PRES | PDE_RW | PDE_A | PDE_D; - - return flags | pde_pat_flags(pat); -} - -static uint64_t pte_pat_flags(int pat) -{ - switch (pat) { - case PAT_UC: - return 0 | PTE_PCD | PTE_PWT; - case PAT_WC: - return 0 | 0 | PTE_PWT; - case PAT_WT: - return PTE_PAT | PTE_PCD | PTE_PWT; - case PAT_WP: - return PTE_PAT | 0 | PTE_PWT; - case PAT_WB: - return 0 | 0 | 0; - case PAT_UC_MINUS: - return 0 | PTE_PCD | 0; - default: - printk(BIOS_ERR, "PTE PAT defaulting to WB: %x\n", pat); - return pte_pat_flags(PAT_WB); - } -} - -static uint64_t pte_page_flags(int pat) -{ - uint64_t flags = PTE_PRES | PTE_RW | PTE_A | PTE_D; - return flags | pte_pat_flags(pat); -} - -/* Identity map an address. This function does not handle splitting or adding - * new pages to the page tables. It's assumed all the page tables are already - * seeded with the correct amount and topology. */ -static int identity_map_one_page(uintptr_t base, size_t size, int pat, - int commit) -{ - uint64_t (*pdpt)[4]; - uint64_t pdpte; - uint64_t (*pd)[512]; - uint64_t pde; - - pdpt = get_pdpt_addr(); - - pdpte = (*pdpt)[(base >> PDPTE_IDX_SHIFT) & PDPTE_IDX_MASK]; - - /* No page table page allocation. */ - if (!(pdpte & PDPTE_PRES)) - return -1; - - pd = (void *)(uintptr_t)(pdpte & PDPTE_ADDR_MASK); - - /* Map in a 2MiB page. */ - if (size == s2MiB) { - if (!commit) - return 0; - pde = base; - pde |= pde_page_flags(pat); - (*pd)[(base >> PDE_IDX_SHIFT) & PDE_IDX_MASK] = pde; - return 0; - } - - if (size == s4KiB) { - uint64_t (*pt)[512]; - uint64_t pte; - - pde = (*pd)[(base >> PDE_IDX_SHIFT) & PDE_IDX_MASK]; - - /* No page table page allocation. */ - if (!(pde & PDE_PRES)) { - printk(BIOS_ERR, "Cannot allocate page table for pde %p\n", - (void *)base); - return -1; - } - - /* No splitting pages */ - if (pde & PDE_PS) { - printk(BIOS_ERR, "Cannot split pde %p\n", (void *)base); - return -1; - } - - if (!commit) - return 0; - - pt = (void *)(uintptr_t)(pde & PDE_ADDR_MASK); - pte = base; - pte |= pte_page_flags(pat); - (*pt)[(base >> PTE_IDX_SHIFT) & PTE_IDX_MASK] = pte; - - return 0; - } - - return -1; -} - -static int _paging_identity_map_addr(uintptr_t base, size_t size, int pat, - int commit) -{ - while (size != 0) { - size_t map_size; - - map_size = IS_ALIGNED(base, s2MiB) ? s2MiB : s4KiB; - map_size = MIN(size, map_size); - - if (identity_map_one_page(base, map_size, pat, commit) < 0) - return -1; - - base += map_size; - size -= map_size; - } - - return 0; -} - -static int paging_is_enabled(void) -{ - return !!(read_cr0() & CR0_PG); -} - -int paging_identity_map_addr(uintptr_t base, size_t size, int pat) -{ - if (!paging_is_enabled()) { - printk(BIOS_ERR, "Paging is not enabled.\n"); - return -1; - } - - if (!IS_ALIGNED(base, s2MiB) && !IS_ALIGNED(base, s4KiB)) { - printk(BIOS_ERR, "base %p is not aligned.\n", (void *)base); - return -1; - } - - if (!IS_ALIGNED(size, s2MiB) && !IS_ALIGNED(size, s4KiB)) { - printk(BIOS_ERR, "size %zx is not aligned.\n", size); - return -1; - } - - /* First try without committing. If success commit. */ - if (_paging_identity_map_addr(base, size, pat, 0)) - return -1; - - return _paging_identity_map_addr(base, size, pat, 1); -} diff --git a/src/include/cpu/x86/pae.h b/src/include/cpu/x86/pae.h index 3accd9e66712..d1cf7347c26f 100644 --- a/src/include/cpu/x86/pae.h +++ b/src/include/cpu/x86/pae.h @@ -35,11 +35,6 @@ void paging_set_default_pat(void); * failure. */ int paging_enable_for_car(const char *pdpt_name, const char *pt_name); -/* Identity map the region indicated by 'base' and 'size'. Both 'base' and - * 'size' need to be 4KiB or 2 MiB aligned. 'pat' should be one of the - * PAT defines above. 0 is returned on success, < 0 on failure. */ -int paging_identity_map_addr(uintptr_t base, size_t size, int pat); - /* To be used with memset_pae */ #define MEMSET_PAE_VMEM_ALIGN (2 * MiB) #define MEMSET_PAE_VMEM_SIZE (2 * MiB) |