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authorTim Wawrzynczak <twawrzynczak@chromium.org>2022-08-03 17:00:28 -0600
committerMartin L Roth <gaumless@gmail.com>2022-08-07 19:34:23 +0000
commit66d090b66446863151790cb0bbbe604d74508846 (patch)
tree4f9938bedc6804297cadbc418a8a346e18cc54dc
parentf85e3cd269010de4114ac9b8eaabf60555e20ea5 (diff)
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mb/google/brya/acpi: Fix PERST# handling in GC6 exit
PERST# is supposed to be de-asserted in GC6 exit, but the original patch used the CTXS Method, which drives a GPIO low, instead of STXS, because PERST# is active-low. This patch fixes that. BUG=b:214581763 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Change-Id: Ib0adb8efe5e2cc733ae2228614c58c124ba3f11b Reviewed-on: https://review.coreboot.org/c/coreboot/+/66402 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com>
-rw-r--r--src/mainboard/google/brya/acpi/power.asl2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/acpi/power.asl b/src/mainboard/google/brya/acpi/power.asl
index 2dd8706a8eca..bb2bc3514b03 100644
--- a/src/mainboard/google/brya/acpi/power.asl
+++ b/src/mainboard/google/brya/acpi/power.asl
@@ -87,7 +87,7 @@ Method (GC6O, 0, Serialized)
GC6E = GC6_STATE_TRANSITION
/* Deassert GPU_PERST_L */
- \_SB.PCI0.CTXS (GPIO_GPU_PERST_L)
+ \_SB.PCI0.STXS (GPIO_GPU_PERST_L)
/* Put PCIe link into L0 state */
\_SB.PCI0.PEG0.LD23 ()