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| author | Ritul Guru <ritul.bits@gmail.com> | 2022-08-29 13:39:09 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-09-22 17:11:13 +0000 |
| commit | 80503e3c54b34c5ceed5edf2d4f2454e57a10c33 (patch) | |
| tree | 4bc9f55c6ba2e4b5d535939c474299bf1e4d0175 | |
| parent | a2cb3400a6dbd23b3fdfd73670951067242a8c57 (diff) | |
| download | coreboot-80503e3c54b34c5ceed5edf2d4f2454e57a10c33.tar.gz coreboot-80503e3c54b34c5ceed5edf2d4f2454e57a10c33.tar.bz2 coreboot-80503e3c54b34c5ceed5edf2d4f2454e57a10c33.zip | |
soc/amd/picasso: Add support for PSP NVRAM base addr and size
Signed-off-by: Ritul Guru <ritul.bits@gmail.com>
Change-Id: I07d5aaac9c05986e8a952c7e670d002d864e18d7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67170
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/soc/amd/picasso/Makefile.inc | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index 4bf18443bc05..d909b2cf62f8 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -125,6 +125,11 @@ endif # BIOS Directory Table items - proper ordering is managed by amdfwtool # +# type = 0x4 +# The flashmap section used for this is expected to be named PSP_NVRAM +PSP_NVRAM_BASE=$(shell awk '$$2 == "FMAP_SECTION_PSP_NVRAM_START" {print $$3}' $(obj)/fmap_config.h) +PSP_NVRAM_SIZE=$(shell awk '$$2 == "FMAP_SECTION_PSP_NVRAM_SIZE" {print $$3}' $(obj)/fmap_config.h) + # type = 0x7 # RSA 2048 signature #ifeq ($(CONFIG_PSP_PLATFORM_SECURE_BOOT),y) @@ -173,6 +178,9 @@ PSP_SOFTFUSE=$(shell A=$(call int-add, \ add_opt_prefix=$(if $(call strip_quotes, $(1)), $(2) $(call strip_quotes, $(1)), ) +OPT_PSP_NVRAM_BASE=$(call add_opt_prefix, $(PSP_NVRAM_BASE), --nvram-base) +OPT_PSP_NVRAM_SIZE=$(call add_opt_prefix, $(PSP_NVRAM_SIZE), --nvram-size) + OPT_VERSTAGE_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_FILE), --verstage) OPT_VERSTAGE_SIG_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_SIG_FILE), --verstage_sig) @@ -207,6 +215,8 @@ endif OPT_WHITELIST_FILE=$(call add_opt_prefix, $(PSP_WHITELIST_FILE), --whitelist) AMDFW_COMMON_ARGS=$(OPT_PSP_APCB_FILES) \ + $(OPT_PSP_NVRAM_BASE) \ + $(OPT_PSP_NVRAM_SIZE) \ $(OPT_PSP_APCB_FILES_BK) \ $(OPT_APOB_ADDR) \ $(OPT_PSP_BIOSBIN_FILE) \ |