summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorRaihow Shi <raihow_shi@wistron.corp-partner.google.com>2022-09-20 18:35:10 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-09-23 14:37:41 +0000
commit8993fc82ff078842cd9f0dcf31ecf1cfbaa25ece (patch)
treef6cd59eba56616c08d9963de08d37151675af28f
parent07192dc7f51131ff3c7f1e7ea14335a4345c5467 (diff)
downloadcoreboot-8993fc82ff078842cd9f0dcf31ecf1cfbaa25ece.tar.gz
coreboot-8993fc82ff078842cd9f0dcf31ecf1cfbaa25ece.tar.bz2
coreboot-8993fc82ff078842cd9f0dcf31ecf1cfbaa25ece.zip
mb/google/brask/variants/moli: update emmc_rtd3 enable gpio pin
EN_PP3300_EMMC has be changed to GPP_A21 for DP++ and it based on Moli GPIO Table_20220803.xlsx, so update enable_gpio for emmc_rtd3 by board_ver. BUG=b:241370405 TEST=emerge-brask coreboot Signed-off-by: Raihow Shi <raihow_shi@wistron.corp-partner.google.com> Change-Id: I129706861fd1fcf061371ce94352331ef44359d9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/67736 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
-rw-r--r--src/mainboard/google/brya/variants/moli/ramstage.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/moli/ramstage.c b/src/mainboard/google/brya/variants/moli/ramstage.c
index ea863c52f5fd..89ccf6b4b29f 100644
--- a/src/mainboard/google/brya/variants/moli/ramstage.c
+++ b/src/mainboard/google/brya/variants/moli/ramstage.c
@@ -11,6 +11,20 @@
#include <fw_config.h>
#include <intelblocks/power_limit.h>
#include <drivers/intel/dptf/chip.h>
+#include <boardid.h>
+#include <soc/intel/common/block/pcie/rtd3/chip.h>
+#include <acpi/acpi_device.h>
+
+static void devtree_update_emmc_rtd3(void)
+{
+ uint32_t board_ver = board_id();
+ struct device *emmc_rtd3 = DEV_PTR(emmc_rtd3);
+ struct soc_intel_common_block_pcie_rtd3_config *config = emmc_rtd3->chip_info;
+ if (board_ver <= 1)
+ return;
+
+ config->enable_gpio = (struct acpi_gpio) ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A21);
+}
const struct cpu_power_limits limits[] = {
/* SKU_ID, TDP (Watts), pl1_min, pl1_max, pl2_min, pl2_max, pl4 */
@@ -65,6 +79,7 @@ const struct psys_config psys_config = {
void variant_devtree_update(void)
{
+ devtree_update_emmc_rtd3();
size_t total_entries = ARRAY_SIZE(limits);
variant_update_psys_power_limits(limits, sys_limits, total_entries, &psys_config);
variant_update_power_limits(limits, total_entries);