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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2019-07-11 12:24:09 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-07-13 17:55:51 +0000 |
| commit | 8b9a3ec93a5b941b62bac3f4176d05dc3f45bd55 (patch) | |
| tree | c303dfe7e719909819355beec2939165e171f427 | |
| parent | 237f1789e3156f7e72776d3cf79801cfd6517ff5 (diff) | |
| download | coreboot-8b9a3ec93a5b941b62bac3f4176d05dc3f45bd55.tar.gz coreboot-8b9a3ec93a5b941b62bac3f4176d05dc3f45bd55.tar.bz2 coreboot-8b9a3ec93a5b941b62bac3f4176d05dc3f45bd55.zip | |
soc/rockchip/rk3288/include/soc: Add missing include <types.h>
Change-Id: Ibde48d7cff582c91f55ad5f1328aac64d018b3c5
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34235
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/soc/rockchip/rk3288/include/soc/sdram.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/rockchip/rk3288/include/soc/sdram.h b/src/soc/rockchip/rk3288/include/soc/sdram.h index 5a26a0ae0663..3ad51b6fa580 100644 --- a/src/soc/rockchip/rk3288/include/soc/sdram.h +++ b/src/soc/rockchip/rk3288/include/soc/sdram.h @@ -16,6 +16,8 @@ #ifndef __SOC_ROCKCHIP_RK3288_SDRAM_H__ #define __SOC_ROCKCHIP_RK3288_SDRAM_H__ +#include <types.h> + enum { DDR3 = 3, LPDDR3 = 6, |