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authorzhaojohn <john.zhao@intel.com>2022-09-22 17:03:35 -0700
committerFelix Held <felix-coreboot@felixheld.de>2022-09-26 14:23:09 +0000
commitff69f5cb3ff432197960d0659fd56c8f952aa8f8 (patch)
tree99d2ed1b24c4246f0161ea850bf283d615f17b11
parent0208b51215ed3bdbd72a3b4dc0b64b7772d77448 (diff)
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mb/google/rex: Allocate resources for PCIe TBT root port
This patch selects the SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES to allocate TBT/USB4 root port resources for PCIe tunneling. BUG=b:248328015 TEST=Built image and verified TBT/USB4 tunneling functions on Rex. Change-Id: I69f4d26bb7b3d74dbda068add284a69f1bbeff40 Signed-off-by: zhaojohn <john.zhao@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/67781 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com>
-rw-r--r--src/mainboard/google/rex/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/rex/Kconfig b/src/mainboard/google/rex/Kconfig
index c0f1b97792ef..f7095953ce1a 100644
--- a/src/mainboard/google/rex/Kconfig
+++ b/src/mainboard/google/rex/Kconfig
@@ -25,6 +25,7 @@ config BOARD_GOOGLE_BASEBOARD_REX
select MAINBOARD_HAS_CHROMEOS
select MEMORY_SOLDERDOWN
select SOC_INTEL_METEORLAKE
+ select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES
select SYSTEM_TYPE_LAPTOP
select TPM_GOOGLE_TI50