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author | Jeremy Compostella <jeremy.compostella@intel.com> | 2023-10-25 10:51:26 -0700 |
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committer | Martin L Roth <gaumless@gmail.com> | 2023-10-30 16:52:07 +0000 |
commit | 56178990be01da72c48019be47457f1b5f54e969 (patch) | |
tree | d9da1556c07844f04621aee600669e714390a944 /Documentation/releases | |
parent | 274d509596c54807de80a0c59c69a8aa7052171b (diff) | |
download | coreboot-56178990be01da72c48019be47457f1b5f54e969.tar.gz coreboot-56178990be01da72c48019be47457f1b5f54e969.tar.bz2 coreboot-56178990be01da72c48019be47457f1b5f54e969.zip |
Documentation: Update 4.22 release notes with x86 CBFS cache support
Change-Id: I7c9ecdc3f8316fdec0bc1bc188f1959fb8b5a458
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78655
Reviewed-by: Nicholas Chin <nic.c3.14@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'Documentation/releases')
-rw-r--r-- | Documentation/releases/coreboot-4.22-relnotes.md | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/Documentation/releases/coreboot-4.22-relnotes.md b/Documentation/releases/coreboot-4.22-relnotes.md index f444e80a8bc4..8b9a099c1257 100644 --- a/Documentation/releases/coreboot-4.22-relnotes.md +++ b/Documentation/releases/coreboot-4.22-relnotes.md @@ -59,6 +59,44 @@ Related important commits: - b7832de0260b042c25bf8f53abcb32e20a29ae9c ("x86: Add .data section support for pre-memory stages") +### x86: Support CBFS cache for pre-memory stages and ramstage + +The CBFS cache scratchpad offers a generic way to decompress CBFS +files through the cbfs_map() function without having to reserve a +per-file specific memory region. + +CBFS cache x86 support has been added to pre-memory stages and +ramstage. + +1. **pre-memory stages**: The new `PRERAM_CBFS_CACHE_SIZE` Kconfig can + be used to set the pre-memory stages CBFS cache size. A cache size + of zero disables the CBFS cache feature for all pre-memory + stages. The default value is 16 KiB which seems a reasonable + minimal value enough to satisfy basic needs such as the + decompression of a small configuration file. This setting can be + adjusted depending on the platform needs and capabilities. + + Note that we have set this size to zero for all the platforms + without enough space in Cache-As-RAM to accommodate the default + size. + +2. **ramstage**: The new `RAMSTAGE_CBFS_CACHE_SIZE` Kconfig can be + used to set the ramstage CBFS cache size. A cache size of zero + disables the CBFS cache feature for ramstage. Similarly to + pre-memory stages support, the default size is 16 KiB. + + As we want to support S3 suspend/resume use-case, the CBFS cache + memory cannot be released to the operating system and therefore + cannot be an unreserved memory region. The ramstage CBFS cache + scratchpad is defined as a simple C static buffer as it allows us + to keep the simple and robust design of the static initialization + of the `cbfs_cache` global variable (cf. src/lib/cbfs.c). + + However, since some AMD SoCs (cf. `SOC_AMD_COMMON_BLOCK_NONCAR` + Kconfig) already define a `_cbfs_cache` region we also introduced a + `POSTRAM_CBFS_CACHE_IN_BSS` Kconfig to gate the use of a static + buffer as the CBFS cache scratchpad. + ### Toolchain updates * Upgrade GMP from 6.2.1 to 6.3.0 |