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| author | Corey Osgood <corey.osgood@gmail.com> | 2008-10-15 15:06:18 +0000 |
|---|---|---|
| committer | Corey Osgood <corey.osgood@gmail.com> | 2008-10-15 15:06:18 +0000 |
| commit | 434a3816e01dfe134ebfa60070582c23e1a188b4 (patch) | |
| tree | ffd95b3e4284f412cf279aca2b175e254ffe3612 /Kconfig | |
| parent | 7644420d83d492c854ebd17d53d9b1525baf538e (diff) | |
| download | coreboot-434a3816e01dfe134ebfa60070582c23e1a188b4.tar.gz coreboot-434a3816e01dfe134ebfa60070582c23e1a188b4.tar.bz2 coreboot-434a3816e01dfe134ebfa60070582c23e1a188b4.zip | |
Add ram init support for the Via CN700 to v3. Note that this isn't based on
current v2 support, but rather an older version I was working on that used too
many registers. It will be ported to v2 (eventually).
Signed-off-by: Corey Osgood <corey.osgood@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@930 f3766cd6-281f-0410-b1cd-43a5c92072e9
Diffstat (limited to 'Kconfig')
| -rw-r--r-- | Kconfig | 4 |
1 files changed, 4 insertions, 0 deletions
@@ -92,6 +92,8 @@ config NORTHBRIDGE_AMD_K8 boolean config NORTHBRIDGE_INTEL_I440BXEMULATION boolean +config NORTHBRIDGE_VIA_CN700 + boolean # Southbridges: config SOUTHBRIDGE_AMD_CS5536 @@ -106,6 +108,8 @@ config SOUTHBRIDGE_AMD_SB600 boolean config SOUTHBRIDGE_AMD_RS690 boolean +config SOUTHBRIDGE_VIA_VT8237 + boolean # Super I/Os: config SUPERIO_WINBOND_W83627HF |