diff options
| author | Ronald G. Minnich <rminnich@gmail.com> | 2009-02-21 00:05:20 +0000 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2009-02-21 00:05:20 +0000 |
| commit | 5f27d204bc48b2308a038efa3915c723feb02b47 (patch) | |
| tree | 71fbdca9dab4f81faf1d064689480f444dccd762 /arch/x86/secondary.S | |
| parent | 41bb62d112be32c57fc36fedbc2ac4108e88ba1c (diff) | |
| download | coreboot-5f27d204bc48b2308a038efa3915c723feb02b47.tar.gz coreboot-5f27d204bc48b2308a038efa3915c723feb02b47.tar.bz2 coreboot-5f27d204bc48b2308a038efa3915c723feb02b47.zip | |
This patch extends core2 smp support to v3. It is an
adaption of the v2 code, with significant cleanup and
simplification. It also works in CAR mode, and has no .bss or .data
usage. It provides for a way to provide AP POST codes to the BSP.
Since one common file with amd changed (lapic.h) I have build-tested this
against serengeti and it is fine.
It builds and I'll be testing it as soon as I can find the power supply for
the kontron (it got "borrowed").
Index: arch/x86/intel/core2/init_cpus.c
new file. Basically an adaptation of the v2 code to v3. All global variables
removed. One big change to note: there is a stack struct, and the
parameters to the secondary_start are struct members. Thus the BSP
can watch the AP, and, neater, the AP can POST to a shared variable
and the BSP can see how far it got.
Index: arch/x86/secondary.S
.S startup for AP.
Index: arch/x86/Kconfig
Delete a dependency.
Index: northbridge/intel/i945/reset_test.c
Add real cold boot detection.
Index: mainboard/kontron/986lcd-m/Makefile
Add some new build files.
Index: mainboard/kontron/986lcd-m/stage1.c
Get rid of ' in #warning that confused some tool.
Index: mainboard/kontron/986lcd-m/initram.c
Call init_cpus.
Index: mainboard/kontron/Kconfig
Turn off SMM for now.
Index: include/arch/x86/lapic.h
Correct a static inline declaration.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@1136 f3766cd6-281f-0410-b1cd-43a5c92072e9
Diffstat (limited to 'arch/x86/secondary.S')
| -rw-r--r-- | arch/x86/secondary.S | 42 |
1 files changed, 38 insertions, 4 deletions
diff --git a/arch/x86/secondary.S b/arch/x86/secondary.S index 14ec3cc654ec..899f90a50d97 100644 --- a/arch/x86/secondary.S +++ b/arch/x86/secondary.S @@ -26,6 +26,7 @@ .balign 4096 _secondary_start: .code16 + .long 0 cli xorl %eax, %eax movl %eax, %cr3 /* Invalidate TLB*/ @@ -58,18 +59,51 @@ _secondary_start: /* Load the Interrupt descriptor table */ lidt idtarg - /* Set the stack pointer, and flag that we are done */ - xorl %eax, %eax - movl secondary_stack, %esp - movl %eax, secondary_stack + /* Set the stack pointer */ + movl _secondary_start, %esp call secondary_cpu_init 1: hlt jmp 1b + .align 4 + +gdt_limit = gdt_end - gdt - 1 /* Compute the table limit. */ + +gdt: +gdtptr: + .word gdt_end - gdt -1 /* Compute the table limit. */ + .long gdt /* We know the offset. */ + .word 0 + + /* selgdt 0x08, flat code segment */ + .word 0xffff, 0x0000 + .byte 0x00, 0x9b, 0xcf, 0x00 + + /* selgdt 0x10, flat data segment */ + .word 0xffff, 0x0000 + .byte 0x00, 0x93, 0xcf, 0x00 + + /* selgdt 0x18, flat code segment for CAR */ + .word 0xffff, 0x0000 + .byte 0x00, 0x9b, 0xcf, 0x00 + + /* selgdt 0x20, flat data segment for CAR */ + .word 0xffff, 0x0000 + .byte 0x00, 0x93, 0xcf, 0x00 +gdt_end: + gdtaddr: .word gdt_limit /* the table limit */ .long gdt /* we know the offset */ +idtarg: + .word _idt_end - _idt - 1 /* limit */ + .long _idt + .word 0 +_idt: + .fill 20, 8, 0 # idt is unitiailzed +_idt_end: + _secondary_start_end: .code32 |