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author | Patrick Georgi <pgeorgi@google.com> | 2021-02-19 16:34:26 +0100 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2021-02-20 17:01:09 +0000 |
commit | 9de060fd34e53a797528e61b8d2f4e1afe99be00 (patch) | |
tree | b8d04d231879fc7db0373d9e383941df950740d1 /payloads/libpayload/include/arm64 | |
parent | e9b0830422206a9c11ff4e83420e385353c3ee8a (diff) | |
download | coreboot-9de060fd34e53a797528e61b8d2f4e1afe99be00.tar.gz coreboot-9de060fd34e53a797528e61b8d2f4e1afe99be00.tar.bz2 coreboot-9de060fd34e53a797528e61b8d2f4e1afe99be00.zip |
libpayload: Use volatile pointers in {read,write}{8,16,32,64}
This is already the case on x86 but not on the ARM platforms, and
{read,write}[bwl] are using volatile pointers, too, so follow suit.
Change-Id: I6819df62016990e12410eaa9c3c97b8b90944b51
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50918
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'payloads/libpayload/include/arm64')
-rw-r--r-- | payloads/libpayload/include/arm64/arch/io.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/payloads/libpayload/include/arm64/arch/io.h b/payloads/libpayload/include/arm64/arch/io.h index 092198842fa9..9d67716f89b4 100644 --- a/payloads/libpayload/include/arm64/arch/io.h +++ b/payloads/libpayload/include/arm64/arch/io.h @@ -81,52 +81,52 @@ static inline void writel(uint32_t _v, volatile void *_a) dmb(); } -static inline uint8_t read8(const void *addr) +static inline uint8_t read8(volatile const void *addr) { dmb(); return *(volatile uint8_t *)addr; } -static inline uint16_t read16(const void *addr) +static inline uint16_t read16(volatile const void *addr) { dmb(); return *(volatile uint16_t *)addr; } -static inline uint32_t read32(const void *addr) +static inline uint32_t read32(volatile const void *addr) { dmb(); return *(volatile uint32_t *)addr; } -static inline uint64_t read64(const void *addr) +static inline uint64_t read64(volatile const void *addr) { dmb(); return *(volatile uint64_t *)addr; } -static inline void write8(void *addr, uint8_t val) +static inline void write8(volatile void *addr, uint8_t val) { dmb(); *(volatile uint8_t *)addr = val; dmb(); } -static inline void write16(void *addr, uint16_t val) +static inline void write16(volatile void *addr, uint16_t val) { dmb(); *(volatile uint16_t *)addr = val; dmb(); } -static inline void write32(void *addr, uint32_t val) +static inline void write32(volatile void *addr, uint32_t val) { dmb(); *(volatile uint32_t *)addr = val; dmb(); } -static inline void write64(void *addr, uint64_t val) +static inline void write64(volatile void *addr, uint64_t val) { dmb(); *(volatile uint64_t *)addr = val; |