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| author | Jordan Crouse <jordan.crouse@amd.com> | 2008-10-20 16:51:20 +0000 |
|---|---|---|
| committer | Jordan Crouse <jordan.crouse@amd.com> | 2008-10-20 16:51:20 +0000 |
| commit | 369a5f6c7a18516cb4da054d0e328f7464da9da7 (patch) | |
| tree | cbb2dd56a1ec1227e8e8295c750c65bbe77c0bb6 /payloads | |
| parent | 17f6a8778817ad592a2458083a1ba46032df22f6 (diff) | |
| download | coreboot-369a5f6c7a18516cb4da054d0e328f7464da9da7.tar.gz coreboot-369a5f6c7a18516cb4da054d0e328f7464da9da7.tar.bz2 coreboot-369a5f6c7a18516cb4da054d0e328f7464da9da7.zip | |
[PATCH] libpayload: Add pci_set_bus_master() function
Allow the payload to enable a PCI device as a bus master.
Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3672 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'payloads')
| -rw-r--r-- | payloads/libpayload/drivers/pci.c | 8 | ||||
| -rw-r--r-- | payloads/libpayload/include/pci.h | 6 |
2 files changed, 13 insertions, 1 deletions
diff --git a/payloads/libpayload/drivers/pci.c b/payloads/libpayload/drivers/pci.c index fc1940afbc83..be92613e886b 100644 --- a/payloads/libpayload/drivers/pci.c +++ b/payloads/libpayload/drivers/pci.c @@ -112,3 +112,11 @@ u32 pci_read_resource(pcidev_t dev, int bar) { return pci_read_config32(dev, 0x10 + (bar * 4)); } + +void pci_set_bus_master(pcidev_t dev) +{ + u16 val = pci_read_config16(dev, REG_COMMAND); + val |= REG_COMMAND_BM; + pci_write_config16(dev, REG_COMMAND, val); +} + diff --git a/payloads/libpayload/include/pci.h b/payloads/libpayload/include/pci.h index 1b51f8cd78e0..93d1267ef509 100644 --- a/payloads/libpayload/include/pci.h +++ b/payloads/libpayload/include/pci.h @@ -35,10 +35,12 @@ typedef u32 pcidev_t; #define REG_VENDOR_ID 0x00 -#define REG_DEVICE_ID 0x04 +#define REG_COMMAND 0x04 #define REG_HEADER_TYPE 0x0E #define REG_PRIMARY_BUS 0x18 +#define REG_COMMAND_BM (1 << 2) + #define HEADER_TYPE_NORMAL 0 #define HEADER_TYPE_BRIDGE 1 #define HEADER_TYPE_CARDBUS 2 @@ -64,4 +66,6 @@ void pci_write_config32(u32 device, u16 reg, u32 val); int pci_find_device(u16 vid, u16 did, pcidev_t *dev); u32 pci_read_resource(pcidev_t dev, int bar); +void pci_set_bus_master(pcidev_t dev); + #endif |