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author | Martin Roth <martin@coreboot.org> | 2020-07-08 16:19:37 -0600 |
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committer | Martin Roth <martinroth@google.com> | 2020-07-09 00:26:05 +0000 |
commit | 037ee4b5562099771795d52cf7149ddff8dd3595 (patch) | |
tree | 995ae6ab809ee40482132a11acfc28091c804d92 /payloads | |
parent | 85dcd2f1ea2cc140f1bbd724d32db532d4908a44 (diff) | |
download | coreboot-037ee4b5562099771795d52cf7149ddff8dd3595.tar.gz coreboot-037ee4b5562099771795d52cf7149ddff8dd3595.tar.bz2 coreboot-037ee4b5562099771795d52cf7149ddff8dd3595.zip |
soc/amd/picasso: Add dummy spinlock for psp_verstage
If CONFIG_CMOS_POST is enabled, psp_verstage breaks because the
spinlock code is missing. Add dummy spinlock code as the spinlocks
aren't needed in the PSP.
TEST=Build with CONFIG_CMOS_POST enabled.
BUG=None
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: Iea6f31e500e1b26f0b974c6eaa486209b9c81459
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43310
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'payloads')
0 files changed, 0 insertions, 0 deletions