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| author | David Milosevic <David.Milosevic@9elements.com> | 2023-09-22 14:34:28 +0200 |
|---|---|---|
| committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2023-12-02 19:16:26 +0000 |
| commit | d982274a4ecc8ed6b42724d03332d06d50393109 (patch) | |
| tree | e21488faa5cac62c9b40b209a02ed6da55d0f88c /src/acpi/Kconfig | |
| parent | faf277995999179794d0a571ffc02faaee363c79 (diff) | |
| download | coreboot-d982274a4ecc8ed6b42724d03332d06d50393109.tar.gz coreboot-d982274a4ecc8ed6b42724d03332d06d50393109.tar.bz2 coreboot-d982274a4ecc8ed6b42724d03332d06d50393109.zip | |
acpi: Add PPTT support
This patch adds code to generate Processor Properties
Topology Tables (PPTT) compliant to the ACPI 6.4 specification.
- The 'acpi_get_pptt_topology' hook is mandatory once ACPI_PPTT
is selected. Its purpose is to return a pointer to a topology tree,
which describes the relationship between CPUs and caches. The hook
can be provided by, for example, mainboard code.
Background: We are currently working on mainboard code for qemu-sbsa
and Neoverse N2. Both require a valid PPTT table. Patch was tested
against the qemu-sbsa board.
Change-Id: Ia119e1ba15756704668116bdbc655190ec94ff10
Signed-off-by: David Milosevic <David.Milosevic@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78071
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src/acpi/Kconfig')
| -rw-r--r-- | src/acpi/Kconfig | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/acpi/Kconfig b/src/acpi/Kconfig index cb2befbac49c..cf51969e4116 100644 --- a/src/acpi/Kconfig +++ b/src/acpi/Kconfig @@ -91,3 +91,17 @@ config MAX_ACPI_TABLE_SIZE_KB default 144 help Set the maximum size of all ACPI tables in KiB. + +config ACPI_PPTT + bool + depends on HAVE_ACPI_TABLES + help + Selected to build an ACPI Processor Properties Topology Table. + +config ACPI_PPTT_MAX_CACHES + int + depends on ACPI_PPTT + default 4 + help + This variable sets the maximum number of distinct caches per + topology level. Increasing this option also increases stack usage. |