diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2019-10-23 18:54:48 +0200 |
---|---|---|
committer | Arthur Heymans <arthur@aheymans.xyz> | 2019-11-03 11:19:24 +0000 |
commit | d05f57cfcbf069e9635c671c1ae53fcfced0c3b7 (patch) | |
tree | 6198d7d347e1dd17e28e808c336063bab9750ace /src/arch/arm64/boot.c | |
parent | 2f389f151a0db244def706bc90fd17fe091d8537 (diff) | |
download | coreboot-d05f57cfcbf069e9635c671c1ae53fcfced0c3b7.tar.gz coreboot-d05f57cfcbf069e9635c671c1ae53fcfced0c3b7.tar.bz2 coreboot-d05f57cfcbf069e9635c671c1ae53fcfced0c3b7.zip |
arch/arm64: Pass cbmem_top to ramstage via calling argument
This solution is very generic and can in principle be implemented on
all arch/soc. Currently the old infrastructure to pass on information
from romstage to ramstage is left in place and will be removed in a
follow-up commit.
Nvidia Tegra will be handled in a separate patch because it has a
custom ramstage entry.
Instead trying to figure out which files can be removed from stages
and which cbmem_top implementations need with preprocessor, rename all
cbmem_top implementation to cbmem_top_romstage.
Mechanisms set in place to pass on information from rom- to ram-stage
will be replaced in a followup commit.
Change-Id: I86cdc5c2fac76797732a3a3398f50c4d1ff6647a
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36275
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/arch/arm64/boot.c')
-rw-r--r-- | src/arch/arm64/boot.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/arch/arm64/boot.c b/src/arch/arm64/boot.c index c6df0ee02e65..479a910cae8c 100644 --- a/src/arch/arm64/boot.c +++ b/src/arch/arm64/boot.c @@ -11,6 +11,7 @@ * GNU General Public License for more details. */ +#include <cbmem.h> #include <arch/cache.h> #include <arch/lib_helpers.h> #include <arch/stages.h> @@ -48,7 +49,10 @@ void arch_prog_run(struct prog *prog) } /* Generic stage entry point. Can be overridden by board/SoC if needed. */ -__weak void stage_entry(void) +__weak void stage_entry(uintptr_t stage_arg) { + if (!ENV_ROMSTAGE_OR_BEFORE) + _cbmem_top_ptr = stage_arg; + main(); } |