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author | Julius Werner <jwerner@chromium.org> | 2015-05-07 16:59:31 -0700 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2015-05-19 20:34:23 +0200 |
commit | f52602a74093a2e342454bc2930f8eee3bc4a670 (patch) | |
tree | 4270fc61a8bd5ba6369e29d5d3ab86747922f29e /src/arch/arm64/boot.c | |
parent | 786b1224795b76889e5eb10644b5102646f4c24b (diff) | |
download | coreboot-f52602a74093a2e342454bc2930f8eee3bc4a670.tar.gz coreboot-f52602a74093a2e342454bc2930f8eee3bc4a670.tar.bz2 coreboot-f52602a74093a2e342454bc2930f8eee3bc4a670.zip |
arm64: Reorganize payload entry code and related Kconfigs
This patch slightly reorganizes arm64/boot.c with the aim of being more
readable. Improve locality of code.
[pg: taken from patch linked below]
Change-Id: Ie9ea6a10b9d5e5c33bf020369afcae4f10ef068e
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 5067e47bc03f04ad2dba044f022716e0fc62bb9e
Original-Change-Id: I1b2038acc0d054716a3c580ce97ea8e9a45abfa2
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/270783
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/10244
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/arch/arm64/boot.c')
-rw-r--r-- | src/arch/arm64/boot.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/arch/arm64/boot.c b/src/arch/arm64/boot.c index 1fdc234fd118..367aaaca2ccd 100644 --- a/src/arch/arm64/boot.c +++ b/src/arch/arm64/boot.c @@ -36,16 +36,16 @@ static void run_payload(struct prog *prog) doit = prog_entry(prog); arg = prog_entry_arg(prog); - uint8_t current_el = get_current_el(); - - printk(BIOS_SPEW, "entry = %p\n", doit); - if (IS_ENABLED(CONFIG_ARM64_USE_SECURE_MONITOR)) secmon_run(doit, arg); else { + uint8_t current_el = get_current_el(); + /* Start the other CPUs spinning. */ spintable_start(); + printk(BIOS_SPEW, "entry = %p\n", doit); + /* If current EL is not EL3, jump to payload at same EL. */ if (current_el != EL3) { cache_sync_instructions(); |