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| author | Srinivas Hegde <srinivashegde@google.com> | 2023-11-21 22:10:36 +0000 |
|---|---|---|
| committer | Julius Werner <jwerner@chromium.org> | 2023-11-29 00:33:13 +0000 |
| commit | 2d589cfc6ca27656f621af634b04e49ed472872f (patch) | |
| tree | 2fa98d875f425469875adb3ff29ec28b09da3ae0 /src/arch | |
| parent | 892711fd776c34d748a9c1a32a9eb06179e5fa02 (diff) | |
| download | coreboot-2d589cfc6ca27656f621af634b04e49ed472872f.tar.gz coreboot-2d589cfc6ca27656f621af634b04e49ed472872f.tar.bz2 coreboot-2d589cfc6ca27656f621af634b04e49ed472872f.zip | |
arch/x86/Makefile.inc: Do not pass CPPFLAGS to linker
We seem to be passing CPPFLAGS to linker in x86 arch
ramstage. This is superflous as these are only meant
to be compiler flags and should not be passed to the
linker.
Change-Id: Ia3cd51be6be252aa796191cf0d2cd91d393c8878
Signed-off-by: Srinivas Hegde <srinivashegde@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79218
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Diffstat (limited to 'src/arch')
| -rw-r--r-- | src/arch/x86/Makefile.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index 75b9d3db77b6..62294a65ce63 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -317,7 +317,7 @@ $(objcbfs)/ramstage.elf: $(objcbfs)/ramstage.debug.rmod $(objcbfs)/ramstage.debug: $(objgenerated)/ramstage.o $(call src-to-obj,ramstage,$(CONFIG_MEMLAYOUT_LD_FILE)) @printf " CC $(subst $(obj)/,,$(@))\n" - $(LD_ramstage) $(CPPFLAGS) $(LDFLAGS_ramstage) -o $@ -L$(obj) $< -T $(call src-to-obj,ramstage,$(CONFIG_MEMLAYOUT_LD_FILE)) + $(LD_ramstage) $(LDFLAGS_ramstage) -o $@ -L$(obj) $< -T $(call src-to-obj,ramstage,$(CONFIG_MEMLAYOUT_LD_FILE)) $(objgenerated)/ramstage.o: $$(ramstage-objs) $(COMPILER_RT_ramstage) $$(ramstage-libs) @printf " CC $(subst $(obj)/,,$(@))\n" |