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| author | Bora Guvendik <bora.guvendik@intel.com> | 2023-03-27 15:43:44 -0700 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2023-04-04 08:08:06 +0000 |
| commit | 28ac0fd2f094875bd81afd8cb96f08e0cf71d2c7 (patch) | |
| tree | 1c8535be5f9b2073d7127fd18612a6882f88c93f /src/commonlib | |
| parent | 94050499ca9fa1b1ebb7a867eea3f722a4ca85c9 (diff) | |
| download | coreboot-28ac0fd2f094875bd81afd8cb96f08e0cf71d2c7.tar.gz coreboot-28ac0fd2f094875bd81afd8cb96f08e0cf71d2c7.tar.bz2 coreboot-28ac0fd2f094875bd81afd8cb96f08e0cf71d2c7.zip | |
commonlib: Add new "DMU load completed" TS
990:CSME ROM started execution 0
944:CSE sent 'Boot Stall Done' to PMC 47,000
945:CSE started to handle ICC configuration 225,000 (178,000)
946:CSE sent 'Host BIOS Prep Done' to PMC 225,000 (0)
947:CSE received 'CPU Reset Done Ack sent' from PMC 516,000 (291,000)
991:Die Management Unit (DMU) load completed 587,000 (71,000)
0:1st timestamp 597,427 (10,427)
BUG=b:259366109
TEST=Boot to OS, check cbmem -t
Change-Id: I4d2da820f39c40ea864d15d25a94a68497b2af3d
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74047
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/commonlib')
| -rw-r--r-- | src/commonlib/include/commonlib/timestamp_serialized.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/commonlib/include/commonlib/timestamp_serialized.h b/src/commonlib/include/commonlib/timestamp_serialized.h index 4b1001ef3927..d7575e78d9d3 100644 --- a/src/commonlib/include/commonlib/timestamp_serialized.h +++ b/src/commonlib/include/commonlib/timestamp_serialized.h @@ -143,6 +143,7 @@ enum timestamp_id { /* 990+ reserved for vendorcode extensions (990-999: Intel ME continued) */ TS_ME_ROM_START = 990, + TS_ESE_DMU_LOAD_END = 991, /* 1000+ reserved for payloads */ @@ -332,6 +333,7 @@ static const struct timestamp_id_to_name { /* Intel ME continued */ TS_NAME_DEF(TS_ME_ROM_START, 0, "CSME ROM started execution"), + TS_NAME_DEF(TS_ESE_DMU_LOAD_END, 0, "Die Management Unit (DMU) load completed"), /* Depthcharge entry timestamp */ TS_NAME_DEF(TS_DC_START, 0, "depthcharge start"), |