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| author | Jonathan Zhang <jonzhang@fb.com> | 2021-04-21 10:40:31 -0700 |
|---|---|---|
| committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2023-03-03 11:10:38 +0000 |
| commit | e111de0752bea95f11963909aaaebf581a362833 (patch) | |
| tree | d48af5c2fef7945e6c8ecb90e3505e7d4edc3a87 /src/commonlib | |
| parent | 555ceca38a784fc3b6a6674431e5e0e67ac55344 (diff) | |
| download | coreboot-e111de0752bea95f11963909aaaebf581a362833.tar.gz coreboot-e111de0752bea95f11963909aaaebf581a362833.tar.bz2 coreboot-e111de0752bea95f11963909aaaebf581a362833.zip | |
lib: set up specific purpose memory as LB_MEM_SOFT_RESERVED
CXL (Compute Express Link) [1] is a cache-coherent interconnect
standard for processors, memory expansion and accelerators.
CXL memory is provided through CXL device which is connected
through CXL/PCIe link, while regular system memory is provided
through DIMMs plugged into DIMM slots which are connected to
memory controllers of processor.
With CXL memory, the server's memory capacity is increased.
CXL memory is in its own NUMA domain, with longer latency
and added bandwidth, comparing to regular system memory.
Host firmware may present CXL memory as specific purpose memory.
Linux kernel dax driver provides direct access to such differentiated
memory. In particular, hmem dax driver provides direct access to
specific purpose memory.
Specific purpose memory needs to be represented in e820 table as
soft reserved, as described in [2].
Add IORESOURCE_SOFT_RESERVE resource property to indicate (memory)
resource that needs to be soft reserved.
Add soft_reserved_ram_resource macro to allow soc/mb code to add
memory resource as soft reserved.
[1] https://www.computeexpresslink.org/
[2] https://web.archive.org/web/20230130233752/https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.10.32&id=262b45ae3ab4bf8e2caf1fcfd0d8307897519630
Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: Ie70795bcb8c97e9dd5fb772adc060e1606f9bab0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52585
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <inforichland@gmail.com>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src/commonlib')
| -rw-r--r-- | src/commonlib/include/commonlib/coreboot_tables.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/commonlib/include/commonlib/coreboot_tables.h b/src/commonlib/include/commonlib/coreboot_tables.h index 86bf5438b7ca..e299e54a384e 100644 --- a/src/commonlib/include/commonlib/coreboot_tables.h +++ b/src/commonlib/include/commonlib/coreboot_tables.h @@ -140,6 +140,7 @@ struct lb_memory_range { #define LB_MEM_UNUSABLE 5 /* Unusable address space */ #define LB_MEM_VENDOR_RSVD 6 /* Vendor Reserved */ #define LB_MEM_TABLE 16 /* Ram configuration tables are kept in */ +#define LB_MEM_SOFT_RESERVED 0xefffffff /* Specific purpose memory */ }; struct lb_memory { |