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author | Martin Roth <martinroth@google.com> | 2017-06-09 09:27:08 -0600 |
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committer | Martin Roth <martinroth@google.com> | 2017-06-12 04:08:55 +0200 |
commit | 53de6cd1c3597f38b69509ea5a34f61c71ca1f5d (patch) | |
tree | 405433fa99fddb0bc271b4c411e88d7dd148c1c2 /src/console | |
parent | 6a3d0bfc1f7e0e7b52c991d144e825ca7edf628e (diff) | |
download | coreboot-53de6cd1c3597f38b69509ea5a34f61c71ca1f5d.tar.gz coreboot-53de6cd1c3597f38b69509ea5a34f61c71ca1f5d.tar.bz2 coreboot-53de6cd1c3597f38b69509ea5a34f61c71ca1f5d.zip |
src/console: add IS_ENABLED() around Kconfig symbol references
Some of these can be changed from #if to if(), but that will happen
in a follow-on commmit.
Change-Id: I5a674cd7a360a0dd040c859ec1f8d760d7c83364
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20130
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/console')
-rw-r--r-- | src/console/console.c | 2 | ||||
-rw-r--r-- | src/console/init.c | 4 | ||||
-rw-r--r-- | src/console/post.c | 22 |
3 files changed, 14 insertions, 14 deletions
diff --git a/src/console/console.c b/src/console/console.c index 877c8dc960c8..16c041e7b185 100644 --- a/src/console/console.c +++ b/src/console/console.c @@ -80,7 +80,7 @@ void console_write_line(uint8_t *buffer, size_t number_of_bytes) } -#if CONFIG_GDB_STUB && (ENV_ROMSTAGE || ENV_RAMSTAGE) +#if IS_ENABLED(CONFIG_GDB_STUB) && (ENV_ROMSTAGE || ENV_RAMSTAGE) void gdb_hw_init(void) { __gdb_hw_init(); diff --git a/src/console/init.c b/src/console/init.c index 1029e6b14f66..c1565a420f9b 100644 --- a/src/console/init.c +++ b/src/console/init.c @@ -33,7 +33,7 @@ static int console_loglevel = CONFIG_DEFAULT_CONSOLE_LOGLEVEL; static inline int get_log_level(void) { - if (CONSOLE_LEVEL_CONST) + if (IS_ENABLED(CONSOLE_LEVEL_CONST)) return CONFIG_DEFAULT_CONSOLE_LOGLEVEL; return console_loglevel; @@ -65,7 +65,7 @@ asmlinkage void console_init(void) { init_log_level(); -#if CONFIG_EARLY_PCI_BRIDGE && !defined(__SMM__) +#if IS_ENABLED(CONFIG_EARLY_PCI_BRIDGE) && !defined(__SMM__) pci_early_bridge_init(); #endif diff --git a/src/console/post.c b/src/console/post.c index 481a1f416504..e7e914759da1 100644 --- a/src/console/post.c +++ b/src/console/post.c @@ -38,7 +38,7 @@ void __attribute__((weak)) mainboard_post(uint8_t value) #define mainboard_post(x) #endif -#if CONFIG_CMOS_POST +#if IS_ENABLED(CONFIG_CMOS_POST) DECLARE_SPIN_LOCK(cmos_post_lock) @@ -46,7 +46,7 @@ DECLARE_SPIN_LOCK(cmos_post_lock) void cmos_post_log(void) { u8 code = 0; -#if CONFIG_CMOS_POST_EXTRA +#if IS_ENABLED(CONFIG_CMOS_POST_EXTRA) u32 extra = 0; #endif @@ -56,13 +56,13 @@ void cmos_post_log(void) switch (cmos_read(CMOS_POST_BANK_OFFSET)) { case CMOS_POST_BANK_0_MAGIC: code = cmos_read(CMOS_POST_BANK_1_OFFSET); -#if CONFIG_CMOS_POST_EXTRA +#if IS_ENABLED(CONFIG_CMOS_POST_EXTRA) extra = cmos_read32(CMOS_POST_BANK_1_EXTRA); #endif break; case CMOS_POST_BANK_1_MAGIC: code = cmos_read(CMOS_POST_BANK_0_OFFSET); -#if CONFIG_CMOS_POST_EXTRA +#if IS_ENABLED(CONFIG_CMOS_POST_EXTRA) extra = cmos_read32(CMOS_POST_BANK_0_EXTRA); #endif break; @@ -80,9 +80,9 @@ void cmos_post_log(void) default: printk(BIOS_WARNING, "POST: Unexpected post code " "in previous boot: 0x%02x\n", code); -#if CONFIG_ELOG +#if IS_ENABLED(CONFIG_ELOG) elog_add_event_word(ELOG_TYPE_LAST_POST_CODE, code); -#if CONFIG_CMOS_POST_EXTRA +#if IS_ENABLED(CONFIG_CMOS_POST_EXTRA) if (extra) elog_add_event_dword(ELOG_TYPE_POST_EXTRA, extra); #endif @@ -90,7 +90,7 @@ void cmos_post_log(void) } } -#if CONFIG_CMOS_POST_EXTRA +#if IS_ENABLED(CONFIG_CMOS_POST_EXTRA) void post_log_extra(u32 value) { spin_lock(&cmos_post_lock); @@ -144,14 +144,14 @@ static void cmos_post_code(u8 value) void post_code(uint8_t value) { -#if !CONFIG_NO_POST -#if CONFIG_CONSOLE_POST +#if !IS_ENABLED(CONFIG_NO_POST) +#if IS_ENABLED(CONFIG_CONSOLE_POST) printk(BIOS_EMERG, "POST: 0x%02x\n", value); #endif -#if CONFIG_CMOS_POST +#if IS_ENABLED(CONFIG_CMOS_POST) cmos_post_code(value); #endif -#if CONFIG_POST_IO +#if IS_ENABLED(CONFIG_POST_IO) outb(value, CONFIG_POST_IO_PORT); #endif #endif |