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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-12-15 21:05:40 +0200 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-12-20 15:47:09 +0000 |
commit | b4f1ecb3c7c0e8cc4bfefaf070e0e70b7d7bd2b9 (patch) | |
tree | 51f56d29be73ca689626eff0e981b2aa8ab07e40 /src/cpu/amd | |
parent | 40a1f70bb0c844f20ae2201a32264a4d6a791668 (diff) | |
download | coreboot-b4f1ecb3c7c0e8cc4bfefaf070e0e70b7d7bd2b9.tar.gz coreboot-b4f1ecb3c7c0e8cc4bfefaf070e0e70b7d7bd2b9.tar.bz2 coreboot-b4f1ecb3c7c0e8cc4bfefaf070e0e70b7d7bd2b9.zip |
AGESA fam14: Remove early p-state setting
No improvement was measured with this applied.
Change-Id: I99166e03f2580828c66305326f5141d956707f08
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37754
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu/amd')
-rw-r--r-- | src/cpu/amd/agesa/family14/fixme.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/src/cpu/amd/agesa/family14/fixme.c b/src/cpu/amd/agesa/family14/fixme.c index c2e859e229cb..2b412fac1d2f 100644 --- a/src/cpu/amd/agesa/family14/fixme.c +++ b/src/cpu/amd/agesa/family14/fixme.c @@ -92,10 +92,6 @@ void amd_initmmio(void) LibAmdMsrWrite(MTRR_PHYS_BASE(6), &MsrReg, &StdHeader); MsrReg = ((1ULL << CONFIG_CPU_ADDR_BITS) - CACHE_ROM_SIZE) | MTRR_PHYS_MASK_VALID; LibAmdMsrWrite(MTRR_PHYS_MASK(6), &MsrReg, &StdHeader); - - /* Set P-state 0 (1600 MHz) early to save a few ms of boot time */ - MsrReg = 0; - LibAmdMsrWrite(PS_CTL_REG, &MsrReg, &StdHeader); } void amd_initenv(void) |