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author | Eugene D Myers <cedarhouse@comcast.net> | 2020-04-15 18:28:10 -0400 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2021-02-22 07:34:16 +0000 |
commit | 6b395cb19077864571d1c85a55b076e8f4c5a2e8 (patch) | |
tree | 3cc8f7017e62298f07d5f14d7b2d5f6936c245c4 /src/cpu/x86/Kconfig | |
parent | b450c8d2cbd072859340a3cda81407ad4dccd16d (diff) | |
download | coreboot-6b395cb19077864571d1c85a55b076e8f4c5a2e8.tar.gz coreboot-6b395cb19077864571d1c85a55b076e8f4c5a2e8.tar.bz2 coreboot-6b395cb19077864571d1c85a55b076e8f4c5a2e8.zip |
intel/stm: Place resource list right below MSEG
Suggested by Nico Huber in CB:38765.
This placement makes the address calculation simpler and
makes its location indepedent of the number of CPUs.
As part of the change in the BIOS resource list address
calculation, the `size` variable was factored out of the
conditional in line 361, thus eliminating the else.
Original-Change-Id: I9ee2747474df02b0306530048bdec75e95413b5d
Original-Signed-off-by: Eugene D Myers <cedarhouse@comcast.net>
Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/40437
Original-Reviewed-by: Nico Huber <nico.h@gmx.de>
Original-Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
(cherry picked from commit 076605bc92730553e9adae543713f0d356a94709)
Signed-off-by: Marc Jones <marcjones@sysproconsulting.com>
Change-Id: Ie62e2bdccd2d09084cc39a0f2fe32df236c08cd6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50312
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Jay Talbott <JayTalbott@sysproconsulting.com>
Reviewed-by: Eugene Myers <cedarhouse1@comcast.net>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/cpu/x86/Kconfig')
0 files changed, 0 insertions, 0 deletions