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author | Elyes HAOUAS <ehaouas@noos.fr> | 2019-06-26 20:17:50 +0200 |
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committer | Martin Roth <martinroth@google.com> | 2019-07-02 16:14:36 +0000 |
commit | 63f98f23045e072b0d07ecdd4cd50d01ad844df7 (patch) | |
tree | cd0cff2a76b8b44b9563de0cf63f2e8b831e9735 /src/cpu | |
parent | 7803e487bdd64ec0f1a8a17a483a4298d38bb77a (diff) | |
download | coreboot-63f98f23045e072b0d07ecdd4cd50d01ad844df7.tar.gz coreboot-63f98f23045e072b0d07ecdd4cd50d01ad844df7.tar.bz2 coreboot-63f98f23045e072b0d07ecdd4cd50d01ad844df7.zip |
src: Use CRx_TYPE type for CRx
Change-Id: If50d9218119d5446d0ce98b8a9297b23bae65c72
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33816
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu')
-rw-r--r-- | src/cpu/x86/lapic/lapic_cpu_init.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/x86/lapic/lapic_cpu_init.c b/src/cpu/x86/lapic/lapic_cpu_init.c index 0f73e71331e2..cbbc10df313b 100644 --- a/src/cpu/x86/lapic/lapic_cpu_init.c +++ b/src/cpu/x86/lapic/lapic_cpu_init.c @@ -417,7 +417,7 @@ asmlinkage void secondary_cpu_init(unsigned int index) * Seems that CR4 was cleared when AP start via lapic_start_cpu() * Turn on CR4.OSFXSR and CR4.OSXMMEXCPT when SSE options enabled */ - u32 cr4_val; + CRx_TYPE cr4_val; cr4_val = read_cr4(); cr4_val |= (CR4_OSFXSR | CR4_OSXMMEXCPT); write_cr4(cr4_val); |