summaryrefslogtreecommitdiffstats
path: root/src/cpu
diff options
context:
space:
mode:
authorShuo Liu <shuo.liu@intel.com>2024-01-27 04:19:41 +0800
committerFelix Singer <service+coreboot-gerrit@felixsinger.de>2024-01-31 13:44:57 +0000
commitd42125cb95c75270dbccce1e038a9aa7e5aaca4f (patch)
tree6468c78e29fe1338a2220b6f61ab2a0fb91fb189 /src/cpu
parentac7076acd421ab75d97fd1192374fba46872abdc (diff)
downloadcoreboot-d42125cb95c75270dbccce1e038a9aa7e5aaca4f.tar.gz
coreboot-d42125cb95c75270dbccce1e038a9aa7e5aaca4f.tar.bz2
coreboot-d42125cb95c75270dbccce1e038a9aa7e5aaca4f.zip
MAINTAINERS: Add Sapphire Rapids FSP header path to Xeon SP
Change-Id: I20ad4bc325d5cfe7a9d5f8b349eeea3d6218452b Signed-off-by: Shuo Liu <shuo.liu@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80241 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src/cpu')
0 files changed, 0 insertions, 0 deletions