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| author | Elyes Haouas <ehaouas@noos.fr> | 2022-12-08 08:48:17 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-12-09 23:59:26 +0000 |
| commit | 60803c12fca18cea4ff2fdc6a5de4e7c1a47f38f (patch) | |
| tree | 1a5d44a72c72a10ff31210ce3b50a762c95a1e36 /src/drivers | |
| parent | 456482c8ca01b17c1744eb86b2e90d69ff3c28e7 (diff) | |
| download | coreboot-60803c12fca18cea4ff2fdc6a5de4e7c1a47f38f.tar.gz coreboot-60803c12fca18cea4ff2fdc6a5de4e7c1a47f38f.tar.bz2 coreboot-60803c12fca18cea4ff2fdc6a5de4e7c1a47f38f.zip | |
drivers/net/atl1e.c: Use {read,write}32p()
Change-Id: Idc9dd4434a8023af4758f921f6279d09059166d9
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70472
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/drivers')
| -rw-r--r-- | src/drivers/net/atl1e.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/drivers/net/atl1e.c b/src/drivers/net/atl1e.c index e44195c50fc7..191a9c55ebcd 100644 --- a/src/drivers/net/atl1e.c +++ b/src/drivers/net/atl1e.c @@ -85,21 +85,21 @@ static void program_mac_address(u32 mem_base) printk(BIOS_DEBUG, "atl1e: Programming MAC Address..."); value = (mac[2] << 24) | (mac[3] << 16) | (mac[4] << 8) | (mac[5] << 0); - write32((void *)mem_base + REG_MAC_STA_ADDR, value); + write32p(mem_base + REG_MAC_STA_ADDR, value); value = (mac[0] << 8) | (mac[1] << 0); - write32((void *)mem_base + REG_MAC_STA_ADDR + 4, value); + write32p(mem_base + REG_MAC_STA_ADDR + 4, value); printk(BIOS_DEBUG, "done\n"); } static int atl1e_eeprom_exist(u32 mem_base) { - u32 value = read32((void *)mem_base + REG_SPI_FLASH_CTRL); + u32 value = read32p(mem_base + REG_SPI_FLASH_CTRL); if (value & SPI_FLASH_CTRL_EN_VPD) { value &= ~SPI_FLASH_CTRL_EN_VPD; - write32((void *)mem_base + REG_SPI_FLASH_CTRL, value); + write32p(mem_base + REG_SPI_FLASH_CTRL, value); } - value = read32((void *)mem_base + REG_PCIE_CAP_LIST); + value = read32p(mem_base + REG_PCIE_CAP_LIST); return ((value & 0xff00) == 0x6c00) ? 1 : 0; } |