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| author | Martin Roth <martin@coreboot.org> | 2020-11-11 09:18:36 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-11-16 11:03:16 +0000 |
| commit | fc2047b1f74f42fc2e38fbafdf09929ca39bfa62 (patch) | |
| tree | 850e67dd5ea4321db6758baed31eb536eb766017 /src/include/device/dram | |
| parent | c6b77d5bf61df8bb0489a841008aa5d2d1ab6d83 (diff) | |
| download | coreboot-fc2047b1f74f42fc2e38fbafdf09929ca39bfa62.tar.gz coreboot-fc2047b1f74f42fc2e38fbafdf09929ca39bfa62.tar.bz2 coreboot-fc2047b1f74f42fc2e38fbafdf09929ca39bfa62.zip | |
src: Change bare 'unsigned' to 'unsigned int'
This fixes all of the current code in coreboot/src where a bare
unsigned is used incorrectly. A follow-on will fix the comments
so that we can enable the unsigned lint checker for src/coreboot.
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I37f34a95bb1894e70cd9e076d4b81ebac665eaeb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47482
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/include/device/dram')
| -rw-r--r-- | src/include/device/dram/ddr2.h | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/src/include/device/dram/ddr2.h b/src/include/device/dram/ddr2.h index 9acf794dec8e..6200fdedd691 100644 --- a/src/include/device/dram/ddr2.h +++ b/src/include/device/dram/ddr2.h @@ -47,35 +47,35 @@ union dimm_flags_ddr2_st { * We do not care how these bits are ordered */ struct { /* Module can work at 5.00V */ - unsigned operable_5_00V:1; + unsigned int operable_5_00V:1; /* Module can work at 3.33V */ - unsigned operable_3_33V:1; + unsigned int operable_3_33V:1; /* Module can work at 2.50V */ - unsigned operable_2_50V:1; + unsigned int operable_2_50V:1; /* Module can work at 1.80V - All DIMMS must be 1.8V operable */ - unsigned operable_1_80V:1; + unsigned int operable_1_80V:1; /* Module can work at 1.50V */ - unsigned operable_1_50V:1; + unsigned int operable_1_50V:1; /* Module can work at 1.35V */ - unsigned operable_1_35V:1; + unsigned int operable_1_35V:1; /* Module can work at 1.20V */ - unsigned operable_1_25V:1; + unsigned int operable_1_25V:1; /* Has an 8-bit bus extension, meaning the DIMM supports ECC */ - unsigned is_ecc:1; + unsigned int is_ecc:1; /* Supports weak driver */ - unsigned weak_driver:1; + unsigned int weak_driver:1; /* Supports terminating at 50 Ohm */ - unsigned terminate_50ohms:1; + unsigned int terminate_50ohms:1; /* Partial Array Self Refresh */ - unsigned pasr:1; + unsigned int pasr:1; /* Supports burst length 8 */ - unsigned bl8:1; + unsigned int bl8:1; /* Supports burst length 4 */ - unsigned bl4:1; + unsigned int bl4:1; /* DIMM Package is stack */ - unsigned stacked:1; + unsigned int stacked:1; /* the assembly supports self refresh */ - unsigned self_refresh:1; + unsigned int self_refresh:1; }; unsigned int raw; }; |